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authorRoman Lebedev <lebedev.ri@gmail.com>2018-07-16 12:44:10 +0000
committerRoman Lebedev <lebedev.ri@gmail.com>2018-07-16 12:44:10 +0000
commitde506632aaf9722b270d4ff29b323da893a92800 (patch)
treee87f0a9b10045977fe6c3ca0c8560112c39f0bd0 /llvm/test/CodeGen/X86/lack-of-signed-truncation-check.ll
parent92a700a215ae940fc2cad41c3a28eed5c38a76b0 (diff)
downloadbcm5719-llvm-de506632aaf9722b270d4ff29b323da893a92800.tar.gz
bcm5719-llvm-de506632aaf9722b270d4ff29b323da893a92800.zip
[X86][AArch64][DAGCombine] Unfold 'check for [no] signed truncation' pattern
Summary: [[ https://bugs.llvm.org/show_bug.cgi?id=38149 | PR38149 ]] As discussed in https://reviews.llvm.org/D49179#1158957 and later, the IR for 'check for [no] signed truncation' pattern can be improved: https://rise4fun.com/Alive/gBf ^ that pattern will be produced by Implicit Integer Truncation sanitizer, https://reviews.llvm.org/D48958 https://bugs.llvm.org/show_bug.cgi?id=21530 in signed case, therefore it is probably a good idea to improve it. But the IR-optimal patter does not lower efficiently, so we want to undo it.. This handles the simple pattern. There is a second pattern with predicate and constants inverted. NOTE: we do not check uses here. we always do the transform. Reviewers: spatel, craig.topper, RKSimon, javed.absar Reviewed By: spatel Subscribers: kristof.beyls, llvm-commits Differential Revision: https://reviews.llvm.org/D49266 llvm-svn: 337166
Diffstat (limited to 'llvm/test/CodeGen/X86/lack-of-signed-truncation-check.ll')
-rw-r--r--llvm/test/CodeGen/X86/lack-of-signed-truncation-check.ll97
1 files changed, 43 insertions, 54 deletions
diff --git a/llvm/test/CodeGen/X86/lack-of-signed-truncation-check.ll b/llvm/test/CodeGen/X86/lack-of-signed-truncation-check.ll
index cc876f3fe20..397b7f98f1d 100644
--- a/llvm/test/CodeGen/X86/lack-of-signed-truncation-check.ll
+++ b/llvm/test/CodeGen/X86/lack-of-signed-truncation-check.ll
@@ -295,19 +295,17 @@ define i1 @add_ultcmp_i64_i8(i64 %x) nounwind {
define i1 @add_ugecmp_i16_i8(i16 %x) nounwind {
; X86-LABEL: add_ugecmp_i16_i8:
; X86: # %bb.0:
-; X86-NEXT: movl $128, %eax
-; X86-NEXT: addl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movzwl %ax, %eax
-; X86-NEXT: cmpl $255, %eax
-; X86-NEXT: seta %al
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movsbl %al, %ecx
+; X86-NEXT: cmpw %ax, %cx
+; X86-NEXT: setne %al
; X86-NEXT: retl
;
; X64-LABEL: add_ugecmp_i16_i8:
; X64: # %bb.0:
-; X64-NEXT: subl $-128, %edi
-; X64-NEXT: movzwl %di, %eax
-; X64-NEXT: cmpl $255, %eax
-; X64-NEXT: seta %al
+; X64-NEXT: movsbl %dil, %eax
+; X64-NEXT: cmpw %di, %ax
+; X64-NEXT: setne %al
; X64-NEXT: retq
%tmp0 = add i16 %x, 128 ; 1U << (8-1)
%tmp1 = icmp uge i16 %tmp0, 256 ; 1U << 8
@@ -317,17 +315,17 @@ define i1 @add_ugecmp_i16_i8(i16 %x) nounwind {
define i1 @add_ugecmp_i32_i16(i32 %x) nounwind {
; X86-LABEL: add_ugecmp_i32_i16:
; X86: # %bb.0:
-; X86-NEXT: movl $32768, %eax # imm = 0x8000
-; X86-NEXT: addl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: cmpl $65535, %eax # imm = 0xFFFF
-; X86-NEXT: seta %al
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movswl %ax, %ecx
+; X86-NEXT: cmpl %eax, %ecx
+; X86-NEXT: setne %al
; X86-NEXT: retl
;
; X64-LABEL: add_ugecmp_i32_i16:
; X64: # %bb.0:
-; X64-NEXT: addl $32768, %edi # imm = 0x8000
-; X64-NEXT: cmpl $65535, %edi # imm = 0xFFFF
-; X64-NEXT: seta %al
+; X64-NEXT: movswl %di, %eax
+; X64-NEXT: cmpl %edi, %eax
+; X64-NEXT: setne %al
; X64-NEXT: retq
%tmp0 = add i32 %x, 32768 ; 1U << (16-1)
%tmp1 = icmp uge i32 %tmp0, 65536 ; 1U << 16
@@ -337,17 +335,17 @@ define i1 @add_ugecmp_i32_i16(i32 %x) nounwind {
define i1 @add_ugecmp_i32_i8(i32 %x) nounwind {
; X86-LABEL: add_ugecmp_i32_i8:
; X86: # %bb.0:
-; X86-NEXT: movl $128, %eax
-; X86-NEXT: addl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: cmpl $255, %eax
-; X86-NEXT: seta %al
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movsbl %al, %ecx
+; X86-NEXT: cmpl %eax, %ecx
+; X86-NEXT: setne %al
; X86-NEXT: retl
;
; X64-LABEL: add_ugecmp_i32_i8:
; X64: # %bb.0:
-; X64-NEXT: subl $-128, %edi
-; X64-NEXT: cmpl $255, %edi
-; X64-NEXT: seta %al
+; X64-NEXT: movsbl %dil, %eax
+; X64-NEXT: cmpl %edi, %eax
+; X64-NEXT: setne %al
; X64-NEXT: retq
%tmp0 = add i32 %x, 128 ; 1U << (8-1)
%tmp1 = icmp uge i32 %tmp0, 256 ; 1U << 8
@@ -358,16 +356,15 @@ define i1 @add_ugecmp_i64_i32(i64 %x) nounwind {
; X86-LABEL: add_ugecmp_i64_i32:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movl $-2147483648, %ecx # imm = 0x80000000
-; X86-NEXT: addl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: adcl $0, %eax
+; X86-NEXT: sarl $31, %eax
+; X86-NEXT: xorl {{[0-9]+}}(%esp), %eax
; X86-NEXT: setne %al
; X86-NEXT: retl
;
; X64-LABEL: add_ugecmp_i64_i32:
; X64: # %bb.0:
-; X64-NEXT: subq $-2147483648, %rdi # imm = 0x80000000
-; X64-NEXT: shrq $32, %rdi
+; X64-NEXT: movslq %edi, %rax
+; X64-NEXT: cmpq %rdi, %rax
; X64-NEXT: setne %al
; X64-NEXT: retq
%tmp0 = add i64 %x, 2147483648 ; 1U << (32-1)
@@ -378,24 +375,20 @@ define i1 @add_ugecmp_i64_i32(i64 %x) nounwind {
define i1 @add_ugecmp_i64_i16(i64 %x) nounwind {
; X86-LABEL: add_ugecmp_i64_i16:
; X86: # %bb.0:
-; X86-NEXT: pushl %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movl $32768, %ecx # imm = 0x8000
-; X86-NEXT: addl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: adcl $0, %eax
-; X86-NEXT: xorl %edx, %edx
-; X86-NEXT: movl $65535, %esi # imm = 0xFFFF
-; X86-NEXT: cmpl %ecx, %esi
-; X86-NEXT: sbbl %eax, %edx
-; X86-NEXT: setb %al
-; X86-NEXT: popl %esi
+; X86-NEXT: movswl %ax, %ecx
+; X86-NEXT: xorl %ecx, %eax
+; X86-NEXT: sarl $31, %ecx
+; X86-NEXT: xorl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: orl %eax, %ecx
+; X86-NEXT: setne %al
; X86-NEXT: retl
;
; X64-LABEL: add_ugecmp_i64_i16:
; X64: # %bb.0:
-; X64-NEXT: addq $32768, %rdi # imm = 0x8000
-; X64-NEXT: cmpq $65535, %rdi # imm = 0xFFFF
-; X64-NEXT: seta %al
+; X64-NEXT: movswq %di, %rax
+; X64-NEXT: cmpq %rdi, %rax
+; X64-NEXT: setne %al
; X64-NEXT: retq
%tmp0 = add i64 %x, 32768 ; 1U << (16-1)
%tmp1 = icmp uge i64 %tmp0, 65536 ; 1U << 16
@@ -405,24 +398,20 @@ define i1 @add_ugecmp_i64_i16(i64 %x) nounwind {
define i1 @add_ugecmp_i64_i8(i64 %x) nounwind {
; X86-LABEL: add_ugecmp_i64_i8:
; X86: # %bb.0:
-; X86-NEXT: pushl %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movl $128, %ecx
-; X86-NEXT: addl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: adcl $0, %eax
-; X86-NEXT: xorl %edx, %edx
-; X86-NEXT: movl $255, %esi
-; X86-NEXT: cmpl %ecx, %esi
-; X86-NEXT: sbbl %eax, %edx
-; X86-NEXT: setb %al
-; X86-NEXT: popl %esi
+; X86-NEXT: movsbl %al, %ecx
+; X86-NEXT: xorl %ecx, %eax
+; X86-NEXT: sarl $31, %ecx
+; X86-NEXT: xorl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: orl %eax, %ecx
+; X86-NEXT: setne %al
; X86-NEXT: retl
;
; X64-LABEL: add_ugecmp_i64_i8:
; X64: # %bb.0:
-; X64-NEXT: subq $-128, %rdi
-; X64-NEXT: cmpq $255, %rdi
-; X64-NEXT: seta %al
+; X64-NEXT: movsbq %dil, %rax
+; X64-NEXT: cmpq %rdi, %rax
+; X64-NEXT: setne %al
; X64-NEXT: retq
%tmp0 = add i64 %x, 128 ; 1U << (8-1)
%tmp1 = icmp uge i64 %tmp0, 256 ; 1U << 8
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