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| author | David Blaikie <dblaikie@gmail.com> | 2015-02-27 21:17:42 +0000 |
|---|---|---|
| committer | David Blaikie <dblaikie@gmail.com> | 2015-02-27 21:17:42 +0000 |
| commit | a79ac14fa68297f9888bc70a10df5ed9b8864e38 (patch) | |
| tree | 8d8217a8928e3ee599bdde405e2e178b3a55b645 /llvm/test/CodeGen/Thumb2/2009-12-01-LoopIVUsers.ll | |
| parent | 83687fb9e654c9d0086e7f6b728c26fa0b729e71 (diff) | |
| download | bcm5719-llvm-a79ac14fa68297f9888bc70a10df5ed9b8864e38.tar.gz bcm5719-llvm-a79ac14fa68297f9888bc70a10df5ed9b8864e38.zip | |
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
llvm-svn: 230794
Diffstat (limited to 'llvm/test/CodeGen/Thumb2/2009-12-01-LoopIVUsers.ll')
| -rw-r--r-- | llvm/test/CodeGen/Thumb2/2009-12-01-LoopIVUsers.ll | 40 |
1 files changed, 20 insertions, 20 deletions
diff --git a/llvm/test/CodeGen/Thumb2/2009-12-01-LoopIVUsers.ll b/llvm/test/CodeGen/Thumb2/2009-12-01-LoopIVUsers.ll index 5c3e2597d9c..bb4bf52e33c 100644 --- a/llvm/test/CodeGen/Thumb2/2009-12-01-LoopIVUsers.ll +++ b/llvm/test/CodeGen/Thumb2/2009-12-01-LoopIVUsers.ll @@ -43,16 +43,16 @@ entry: store i32 %x_size, i32* %x_size_addr store i32 %y_size, i32* %y_size_addr store i8* %bp, i8** %bp_addr - %0 = load i8** %in_addr, align 4 ; <i8*> [#uses=1] + %0 = load i8*, i8** %in_addr, align 4 ; <i8*> [#uses=1] store i8* %0, i8** %out, align 4 %1 = call i32 (...)* @foo() nounwind ; <i32> [#uses=1] store i32 %1, i32* %i, align 4 - %2 = load i32* %three_by_three_addr, align 4 ; <i32> [#uses=1] + %2 = load i32, i32* %three_by_three_addr, align 4 ; <i32> [#uses=1] %3 = icmp eq i32 %2, 0 ; <i1> [#uses=1] br i1 %3, label %bb, label %bb2 bb: ; preds = %entry - %4 = load float* %dt_addr, align 4 ; <float> [#uses=1] + %4 = load float, float* %dt_addr, align 4 ; <float> [#uses=1] %5 = fpext float %4 to double ; <double> [#uses=1] %6 = fmul double %5, 1.500000e+00 ; <double> [#uses=1] %7 = fptosi double %6 to i32 ; <i32> [#uses=1] @@ -65,54 +65,54 @@ bb2: ; preds = %entry br label %bb3 bb3: ; preds = %bb2, %bb - %9 = load i32* %mask_size, align 4 ; <i32> [#uses=1] + %9 = load i32, i32* %mask_size, align 4 ; <i32> [#uses=1] %10 = mul i32 %9, 2 ; <i32> [#uses=1] %11 = add nsw i32 %10, 1 ; <i32> [#uses=1] store i32 %11, i32* %n_max, align 4 - %12 = load i32* %x_size_addr, align 4 ; <i32> [#uses=1] - %13 = load i32* %n_max, align 4 ; <i32> [#uses=1] + %12 = load i32, i32* %x_size_addr, align 4 ; <i32> [#uses=1] + %13 = load i32, i32* %n_max, align 4 ; <i32> [#uses=1] %14 = sub i32 %12, %13 ; <i32> [#uses=1] store i32 %14, i32* %increment, align 4 - %15 = load i32* %n_max, align 4 ; <i32> [#uses=1] - %16 = load i32* %n_max, align 4 ; <i32> [#uses=1] + %15 = load i32, i32* %n_max, align 4 ; <i32> [#uses=1] + %16 = load i32, i32* %n_max, align 4 ; <i32> [#uses=1] %17 = mul i32 %15, %16 ; <i32> [#uses=1] %18 = call noalias i8* @malloc(i32 %17) nounwind ; <i8*> [#uses=1] store i8* %18, i8** %dp, align 4 - %19 = load i8** %dp, align 4 ; <i8*> [#uses=1] + %19 = load i8*, i8** %dp, align 4 ; <i8*> [#uses=1] store i8* %19, i8** %dpt, align 4 - %20 = load float* %dt_addr, align 4 ; <float> [#uses=1] - %21 = load float* %dt_addr, align 4 ; <float> [#uses=1] + %20 = load float, float* %dt_addr, align 4 ; <float> [#uses=1] + %21 = load float, float* %dt_addr, align 4 ; <float> [#uses=1] %22 = fmul float %20, %21 ; <float> [#uses=1] %23 = fsub float -0.000000e+00, %22 ; <float> [#uses=1] store float %23, float* %temp, align 4 - %24 = load i32* %mask_size, align 4 ; <i32> [#uses=1] + %24 = load i32, i32* %mask_size, align 4 ; <i32> [#uses=1] %25 = sub i32 0, %24 ; <i32> [#uses=1] store i32 %25, i32* %j, align 4 br label %bb5 bb4: ; preds = %bb5 - %26 = load i32* %j, align 4 ; <i32> [#uses=1] - %27 = load i32* %j, align 4 ; <i32> [#uses=1] + %26 = load i32, i32* %j, align 4 ; <i32> [#uses=1] + %27 = load i32, i32* %j, align 4 ; <i32> [#uses=1] %28 = mul i32 %26, %27 ; <i32> [#uses=1] %29 = sitofp i32 %28 to double ; <double> [#uses=1] %30 = fmul double %29, 1.234000e+00 ; <double> [#uses=1] %31 = fptosi double %30 to i32 ; <i32> [#uses=1] store i32 %31, i32* %x, align 4 - %32 = load i32* %x, align 4 ; <i32> [#uses=1] + %32 = load i32, i32* %x, align 4 ; <i32> [#uses=1] %33 = trunc i32 %32 to i8 ; <i8> [#uses=1] - %34 = load i8** %dpt, align 4 ; <i8*> [#uses=1] + %34 = load i8*, i8** %dpt, align 4 ; <i8*> [#uses=1] store i8 %33, i8* %34, align 1 - %35 = load i8** %dpt, align 4 ; <i8*> [#uses=1] + %35 = load i8*, i8** %dpt, align 4 ; <i8*> [#uses=1] %36 = getelementptr inbounds i8, i8* %35, i64 1 ; <i8*> [#uses=1] store i8* %36, i8** %dpt, align 4 - %37 = load i32* %j, align 4 ; <i32> [#uses=1] + %37 = load i32, i32* %j, align 4 ; <i32> [#uses=1] %38 = add nsw i32 %37, 1 ; <i32> [#uses=1] store i32 %38, i32* %j, align 4 br label %bb5 bb5: ; preds = %bb4, %bb3 - %39 = load i32* %j, align 4 ; <i32> [#uses=1] - %40 = load i32* %mask_size, align 4 ; <i32> [#uses=1] + %39 = load i32, i32* %j, align 4 ; <i32> [#uses=1] + %40 = load i32, i32* %mask_size, align 4 ; <i32> [#uses=1] %41 = icmp sle i32 %39, %40 ; <i1> [#uses=1] br i1 %41, label %bb4, label %bb6 |

