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authorAlex Bradbury <asb@lowrisc.org>2018-11-30 10:06:31 +0000
committerAlex Bradbury <asb@lowrisc.org>2018-11-30 10:06:31 +0000
commitbd24c7b045646f59f1fbf3298a2caab972726af4 (patch)
treea1a26f325de498ed49927c7f9dbc03e967920135 /llvm/test/CodeGen/RISCV
parent9cf417db7879c7d8fe3745a8c03517cd4d0f9f15 (diff)
downloadbcm5719-llvm-bd24c7b045646f59f1fbf3298a2caab972726af4.tar.gz
bcm5719-llvm-bd24c7b045646f59f1fbf3298a2caab972726af4.zip
[SelectionDAG] Support promotion of PREFETCH operands
For targets where i32 is not a legal type (e.g. 64-bit RISC-V), LegalizeIntegerTypes must promote the operands of ISD::PREFETCH. Differential Revision: https://reviews.llvm.org/D53281 llvm-svn: 347980
Diffstat (limited to 'llvm/test/CodeGen/RISCV')
-rw-r--r--llvm/test/CodeGen/RISCV/prefetch.ll19
1 files changed, 19 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/RISCV/prefetch.ll b/llvm/test/CodeGen/RISCV/prefetch.ll
new file mode 100644
index 00000000000..7891b2e8c74
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/prefetch.ll
@@ -0,0 +1,19 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
+; RUN: | FileCheck -check-prefix=RV32I %s
+; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \
+; RUN: | FileCheck -check-prefix=RV64I %s
+
+declare void @llvm.prefetch(i8*, i32, i32, i32)
+
+define void @test_prefetch(i8* %a) nounwind {
+; RV32I-LABEL: test_prefetch:
+; RV32I: # %bb.0:
+; RV32I-NEXT: ret
+;
+; RV64I-LABEL: test_prefetch:
+; RV64I: # %bb.0:
+; RV64I-NEXT: ret
+ call void @llvm.prefetch(i8* %a, i32 0, i32 1, i32 2)
+ ret void
+}
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