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| author | Tom Stellard <thomas.stellard@amd.com> | 2015-01-29 16:55:25 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2015-01-29 16:55:25 +0000 |
| commit | 83f0bcef7a3e96d022f8d31fd87c8363fd4f9a00 (patch) | |
| tree | f29b52cf36d73c5cdc161b00203816b987f329a5 /llvm/test/CodeGen/R600/fmax3.ll | |
| parent | e75aa4983c8bb64f63c8742d2e3dc32c6966b74b (diff) | |
| download | bcm5719-llvm-83f0bcef7a3e96d022f8d31fd87c8363fd4f9a00.tar.gz bcm5719-llvm-83f0bcef7a3e96d022f8d31fd87c8363fd4f9a00.zip | |
R600/SI: Define a schedule model and enable the generic machine scheduler
The schedule model is not complete yet, and could be improved.
llvm-svn: 227461
Diffstat (limited to 'llvm/test/CodeGen/R600/fmax3.ll')
| -rw-r--r-- | llvm/test/CodeGen/R600/fmax3.ll | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/test/CodeGen/R600/fmax3.ll b/llvm/test/CodeGen/R600/fmax3.ll index e1b477c5921..629c032f27c 100644 --- a/llvm/test/CodeGen/R600/fmax3.ll +++ b/llvm/test/CodeGen/R600/fmax3.ll @@ -4,9 +4,9 @@ declare float @llvm.maxnum.f32(float, float) nounwind readnone ; SI-LABEL: {{^}}test_fmax3_olt_0: -; SI: buffer_load_dword [[REGA:v[0-9]+]] -; SI: buffer_load_dword [[REGB:v[0-9]+]] ; SI: buffer_load_dword [[REGC:v[0-9]+]] +; SI: buffer_load_dword [[REGB:v[0-9]+]] +; SI: buffer_load_dword [[REGA:v[0-9]+]] ; SI: v_max3_f32 [[RESULT:v[0-9]+]], [[REGC]], [[REGB]], [[REGA]] ; SI: buffer_store_dword [[RESULT]], ; SI: s_endpgm @@ -22,8 +22,8 @@ define void @test_fmax3_olt_0(float addrspace(1)* %out, float addrspace(1)* %apt ; Commute operand of second fmax ; SI-LABEL: {{^}}test_fmax3_olt_1: -; SI: buffer_load_dword [[REGA:v[0-9]+]] ; SI: buffer_load_dword [[REGB:v[0-9]+]] +; SI: buffer_load_dword [[REGA:v[0-9]+]] ; SI: buffer_load_dword [[REGC:v[0-9]+]] ; SI: v_max3_f32 [[RESULT:v[0-9]+]], [[REGC]], [[REGB]], [[REGA]] ; SI: buffer_store_dword [[RESULT]], |
