MIR Serialization: Serialize the bundled machine instructions.

llvm-svn: 245082

5 files changed, 177 insertions, 0 deletions

diff --git a/llvm/test/CodeGen/MIR/ARM/bundled-instructions.mir b/llvm/test/CodeGen/MIR/ARM/bundled-instructions.mir
new file mode 100644
index 00000000000..a13d18748c1
--- /dev/null
+++ b/llvm/test/CodeGen/MIR/ARM/bundled-instructions.mir
@@ -0,0 +1,75 @@
+# RUN: llc -mtriple thumbv7-apple-ios -start-after block-placement -stop-after block-placement -o /dev/null %s | FileCheck %s
+# This test ensures that the MIR parser parses the bundled machine instructions
+# correctly.
+
+--- |
+
+  define i32 @test1(i32 %a) {
+  entry:
+    %cmp = icmp sgt i32 %a, -78
+    %. = zext i1 %cmp to i32
+    ret i32 %.
+  }
+
+  define i32 @test2(i32 %a) {
+  entry:
+    %cmp = icmp sgt i32 %a, -78
+    %. = zext i1 %cmp to i32
+    ret i32 %.
+  }
+
+...
+---
+name:            test1
+tracksRegLiveness: true
+liveins:
+  - { reg: '%r0' }
+body: |
+  bb.0.entry:
+    liveins: %r0
+    ; CHECK-LABEL: name: test1
+    ; CHECK:      %r1 = t2MOVi 0, 14, _, _
+    ; CHECK-NEXT: t2CMNri killed %r0, 78, 14, _, implicit-def %cpsr
+    ; CHECK-NEXT: BUNDLE implicit-def dead %itstate, implicit-def %r1, implicit killed %cpsr {
+    ; CHECK-NEXT:   t2IT 12, 8, implicit-def %itstate
+    ; CHECK-NEXT:   %r1 = t2MOVi 1, 12, killed %cpsr, _
+    ; CHECK-NEXT: }
+    ; CHECK-NEXT: %r0 = tMOVr killed %r1, 14, _
+    ; CHECK-NEXT: tBX_RET 14, _, implicit killed %r0
+    %r1 = t2MOVi 0, 14, _, _
+    t2CMNri killed %r0, 78, 14, _, implicit-def %cpsr
+    BUNDLE implicit-def dead %itstate, implicit-def %r1, implicit killed %cpsr {
+      t2IT 12, 8, implicit-def %itstate
+      %r1 = t2MOVi 1, 12, killed %cpsr, _
+    }
+    %r0 = tMOVr killed %r1, 14, _
+    tBX_RET 14, _, implicit killed %r0
+...
+---
+name:            test2
+tracksRegLiveness: true
+liveins:
+  - { reg: '%r0' }
+body: |
+  bb.0.entry:
+    liveins: %r0
+
+    ; Verify that the next machine instruction can be on the same line as
+    ; '{' or '}'.
+
+    ; CHECK-LABEL: name: test2
+    ; CHECK:      %r1 = t2MOVi 0, 14, _, _
+    ; CHECK-NEXT: t2CMNri killed %r0, 78, 14, _, implicit-def %cpsr
+    ; CHECK-NEXT: BUNDLE implicit-def dead %itstate, implicit-def %r1, implicit killed %cpsr {
+    ; CHECK-NEXT:   t2IT 12, 8, implicit-def %itstate
+    ; CHECK-NEXT:   %r1 = t2MOVi 1, 12, killed %cpsr, _
+    ; CHECK-NEXT: }
+    ; CHECK-NEXT: %r0 = tMOVr killed %r1, 14, _
+    ; CHECK-NEXT: tBX_RET 14, _, implicit killed %r0
+    %r1 = t2MOVi 0, 14, _, _
+    t2CMNri killed %r0, 78, 14, _, implicit-def %cpsr
+    BUNDLE implicit-def dead %itstate, implicit-def %r1, implicit killed %cpsr { t2IT 12, 8, implicit-def %itstate
+      %r1 = t2MOVi 1, 12, killed %cpsr, _
+    } %r0 = tMOVr killed %r1, 14, _
+    tBX_RET 14, _, implicit killed %r0
+...
diff --git a/llvm/test/CodeGen/MIR/ARM/expected-closing-brace.mir b/llvm/test/CodeGen/MIR/ARM/expected-closing-brace.mir
new file mode 100644
index 00000000000..78d91aead24
--- /dev/null
+++ b/llvm/test/CodeGen/MIR/ARM/expected-closing-brace.mir
@@ -0,0 +1,50 @@
+# RUN: not llc -mtriple thumbv7-apple-ios -start-after block-placement -stop-after block-placement -o /dev/null %s 2>&1 | FileCheck %s
+
+--- |
+  @G = external global i32
+
+  define i32 @test1(i32 %a) {
+  entry:
+    br label %foo
+
+  foo:
+    %cmp = icmp sgt i32 %a, -78
+    %. = zext i1 %cmp to i32
+    br i1 %cmp, label %if.then, label %if.else
+
+  if.then:
+    ret i32 %.
+
+  if.else:
+    %b = load i32, i32* @G
+    %c = add i32 %b, 1
+    br label %foo
+  }
+...
+---
+name:            test1
+tracksRegLiveness: true
+liveins:
+  - { reg: '%r0' }
+body: |
+  bb.0.entry:
+    successors: %bb.1.foo
+    liveins: %r0
+  bb.1.foo:
+    successors: %bb.2.if.then, %bb.1.foo
+    liveins: %r0
+
+    t2CMNri %r0, 78, 14, _, implicit-def %cpsr
+    %r1 = t2MOVi 0, 14, _, _
+    BUNDLE implicit-def dead %itstate, implicit-def %r1, implicit killed %cpsr {
+      t2IT 12, 8, implicit-def %itstate
+      %r1 = t2MOVi 1, 12, killed %cpsr, _, implicit killed %itstate
+    t2CMNri %r0, 77, 14, _, implicit-def %cpsr
+    t2Bcc %bb.1.foo, 11, killed %cpsr
+  ; CHECK: [[@LINE+1]]:3: expected '}'
+  bb.2.if.then:
+    liveins: %r1
+
+    %r0 = tMOVr killed %r1, 14, _
+    tBX_RET 14, _, implicit killed %r0
+...
diff --git a/llvm/test/CodeGen/MIR/ARM/extraneous-closing-brace-error.mir b/llvm/test/CodeGen/MIR/ARM/extraneous-closing-brace-error.mir
new file mode 100644
index 00000000000..a069dd30793
--- /dev/null
+++ b/llvm/test/CodeGen/MIR/ARM/extraneous-closing-brace-error.mir
@@ -0,0 +1,20 @@
+# RUN: not llc -mtriple thumbv7-apple-ios -start-after block-placement -stop-after block-placement -o /dev/null %s 2>&1 | FileCheck %s
+
+--- |
+  define i32 @test1(i32 %a) {
+  entry:
+    ret i32 %a
+  }
+...
+---
+name:            test1
+tracksRegLiveness: true
+liveins:
+  - { reg: '%r0' }
+body: |
+  bb.0.entry:
+    liveins: %r0
+    tBX_RET 14, _, implicit killed %r0
+  ; CHECK: [[@LINE+1]]:5: extraneous closing brace ('}')
+    }
+...
diff --git a/llvm/test/CodeGen/MIR/ARM/lit.local.cfg b/llvm/test/CodeGen/MIR/ARM/lit.local.cfg
new file mode 100644
index 00000000000..236e1d34416
--- /dev/null
+++ b/llvm/test/CodeGen/MIR/ARM/lit.local.cfg
@@ -0,0 +1,2 @@
+if not 'ARM' in config.root.targets:
+    config.unsupported = True
diff --git a/llvm/test/CodeGen/MIR/ARM/nested-instruction-bundle-error.mir b/llvm/test/CodeGen/MIR/ARM/nested-instruction-bundle-error.mir
new file mode 100644
index 00000000000..b93697857e7
--- /dev/null
+++ b/llvm/test/CodeGen/MIR/ARM/nested-instruction-bundle-error.mir
@@ -0,0 +1,30 @@
+# RUN: not llc -mtriple thumbv7-apple-ios -start-after block-placement -stop-after block-placement -o /dev/null %s 2>&1 | FileCheck %s
+
+--- |
+  define i32 @test1(i32 %a) {
+  entry:
+    %cmp = icmp sgt i32 %a, -78
+    %. = zext i1 %cmp to i32
+    ret i32 %.
+  }
+...
+---
+name:            test1
+tracksRegLiveness: true
+liveins:
+  - { reg: '%r0' }
+body: |
+  bb.0.entry:
+    liveins: %r0
+    %r1 = t2MOVi 0, 14, _, _
+    t2CMNri killed %r0, 78, 14, _, implicit-def %cpsr
+    BUNDLE implicit-def dead %itstate, implicit-def %r1, implicit killed %cpsr {
+      t2IT 12, 8, implicit-def %itstate
+      %r1 = t2MOVi 1, 12, killed %cpsr, _
+  ; CHECK: [[@LINE+1]]:14: nested instruction bundles are not allowed
+      BUNDLE {
+      }
+    }
+    %r0 = tMOVr killed %r1, 14, _
+    tBX_RET 14, _, implicit killed %r0
+...