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| author | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2017-03-02 17:50:24 +0000 |
|---|---|---|
| committer | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2017-03-02 17:50:24 +0000 |
| commit | fcbb7d10fe777e2afba891c6e19ef0013c3f6963 (patch) | |
| tree | 46dbda19565a61a9d89c71ff012e72b0c348c7ce /llvm/test/CodeGen/Hexagon | |
| parent | db8425eff02c69e9f8e59603e1b2808dbed56823 (diff) | |
| download | bcm5719-llvm-fcbb7d10fe777e2afba891c6e19ef0013c3f6963.tar.gz bcm5719-llvm-fcbb7d10fe777e2afba891c6e19ef0013c3f6963.zip | |
[Hexagon] Properly handle 'q' constraint in 128-byte vector mode
llvm-svn: 296772
Diffstat (limited to 'llvm/test/CodeGen/Hexagon')
| -rw-r--r-- | llvm/test/CodeGen/Hexagon/inline-asm-vecpred128.ll | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/Hexagon/inline-asm-vecpred128.ll b/llvm/test/CodeGen/Hexagon/inline-asm-vecpred128.ll new file mode 100644 index 00000000000..234f5a0b792 --- /dev/null +++ b/llvm/test/CodeGen/Hexagon/inline-asm-vecpred128.ll @@ -0,0 +1,15 @@ +; RUN: llc -march=hexagon < %s | FileCheck %s +; REQUIRES: asserts + +; Make sure we can handle the 'q' constraint in the 128-byte mode. + +target triple = "hexagon" + +; CHECK-LABEL: fred +; CHECK: if (q{{[0-3]}}) vmem +define void @fred() #0 { + tail call void asm sideeffect "if ($0) vmem($1) = $2;", "q,r,v,~{memory}"(<32 x i32> undef, <32 x i32>* undef, <32 x i32> undef) #0 + ret void +} + +attributes #0 = { nounwind "target-cpu"="hexagonv60" "target-features"="+hvx,+hvx-double" } |
