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| author | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2018-03-12 14:01:28 +0000 |
|---|---|---|
| committer | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2018-03-12 14:01:28 +0000 |
| commit | 046090db5330dd87e54a7b46ec34384dd3b43c31 (patch) | |
| tree | 502084412f49f650e9c86e075a1e14f3ad4711be /llvm/test/CodeGen/Hexagon/inline-asm-error.ll | |
| parent | 947e0acb6fa0fedac05530df98f589e928456278 (diff) | |
| download | bcm5719-llvm-046090db5330dd87e54a7b46ec34384dd3b43c31.tar.gz bcm5719-llvm-046090db5330dd87e54a7b46ec34384dd3b43c31.zip | |
[Hexagon] Add more lit tests
llvm-svn: 327271
Diffstat (limited to 'llvm/test/CodeGen/Hexagon/inline-asm-error.ll')
| -rw-r--r-- | llvm/test/CodeGen/Hexagon/inline-asm-error.ll | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/Hexagon/inline-asm-error.ll b/llvm/test/CodeGen/Hexagon/inline-asm-error.ll new file mode 100644 index 00000000000..a8901a9d226 --- /dev/null +++ b/llvm/test/CodeGen/Hexagon/inline-asm-error.ll @@ -0,0 +1,15 @@ +; RUN: not llc -march=hexagon < %s 2>&1 | FileCheck %s + +; CHECK: error: Don't know how to handle indirect register inputs yet for constraint 'r' + +%s.0 = type { i8*, i32, %s.1 } +%s.1 = type { %s.2 } +%s.2 = type { i32, i8* } + +define void @f0(%s.0* byval align 8 %a0) { +b0: + call void asm sideeffect ".weak OFFSET_0;jump ##(OFFSET_0 + 0x14c15f0)", "*r"(%s.0* nonnull %a0), !srcloc !0 + ret void +} + +!0 = !{i32 10} |
