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| author | Roman Tereshin <rtereshin@apple.com> | 2019-02-22 14:33:46 +0000 |
|---|---|---|
| committer | Roman Tereshin <rtereshin@apple.com> | 2019-02-22 14:33:46 +0000 |
| commit | 99a6672bba806a2cb8dde1635d529b484345a49e (patch) | |
| tree | f14a5079b90c4db909715f77b0511abf841ac99f /llvm/test/CodeGen/AMDGPU | |
| parent | 70e97163e0809d74955bfa157d1c1eaefbd92ea2 (diff) | |
| download | bcm5719-llvm-99a6672bba806a2cb8dde1635d529b484345a49e.tar.gz bcm5719-llvm-99a6672bba806a2cb8dde1635d529b484345a49e.zip | |
[LowerSwitch][AMDGPU] Do not handle impossible values
This patch adds LazyValueInfo to LowerSwitch to compute the range of the
value being switched over and reduce the size of the tree LowerSwitch
builds to lower a switch.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D58096
llvm-svn: 354670
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/valu-i1.ll | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/valu-i1.ll b/llvm/test/CodeGen/AMDGPU/valu-i1.ll index ca85f0bee4c..c64d4fce69d 100644 --- a/llvm/test/CodeGen/AMDGPU/valu-i1.ll +++ b/llvm/test/CodeGen/AMDGPU/valu-i1.ll @@ -8,7 +8,7 @@ declare i32 @llvm.amdgcn.workitem.id.x() nounwind readnone ; waitcnt should be inserted after exec modification -; SI: v_cmp_lt_i32_e32 vcc, 0, +; SI: v_cmp_lt_i32_e32 vcc, 1, ; SI-NEXT: s_mov_b64 {{s\[[0-9]+:[0-9]+\]}}, 0 ; SI-NEXT: s_mov_b64 {{s\[[0-9]+:[0-9]+\]}}, 0 ; SI-NEXT: s_and_saveexec_b64 [[SAVE1:s\[[0-9]+:[0-9]+\]]], vcc @@ -31,16 +31,16 @@ define amdgpu_kernel void @test_if(i32 %b, i32 addrspace(1)* %src, i32 addrspace entry: %tid = call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone switch i32 %tid, label %default [ - i32 0, label %case0 i32 1, label %case1 + i32 2, label %case2 ] -case0: +case1: %arrayidx1 = getelementptr i32, i32 addrspace(1)* %dst, i32 %b store i32 13, i32 addrspace(1)* %arrayidx1, align 4 br label %end -case1: +case2: %arrayidx5 = getelementptr i32, i32 addrspace(1)* %dst, i32 %b store i32 17, i32 addrspace(1)* %arrayidx5, align 4 br label %end |
