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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-02-15 15:24:31 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-02-15 15:24:31 +0000 |
| commit | 4673fdc5311334da6bd1d0638e2cdb3e1424b0b5 (patch) | |
| tree | 4498a5dee6c3a672709db2d06190ffd325b45e09 /llvm/test/CodeGen/AMDGPU | |
| parent | fb4df68f48702377845a471fddcd1f67a3889ae4 (diff) | |
| download | bcm5719-llvm-4673fdc5311334da6bd1d0638e2cdb3e1424b0b5.tar.gz bcm5719-llvm-4673fdc5311334da6bd1d0638e2cdb3e1424b0b5.zip | |
Try to organize MachineVerifier tests
The Verifier is separate from the MachineVerifier, so move it to a
different directory. Some other verifier tests were scattered in
target codegen tests as well (although I'm sure I missed some). Work
towards using a more consistent naming scheme to make it clearer where
the gaps still are for generic instructions.
llvm-svn: 354138
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/verifier-implicit-virtreg-invalid-physreg-liveness.mir | 21 | ||||
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/verifier-pseudo-terminators.mir | 23 |
2 files changed, 0 insertions, 44 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/verifier-implicit-virtreg-invalid-physreg-liveness.mir b/llvm/test/CodeGen/AMDGPU/verifier-implicit-virtreg-invalid-physreg-liveness.mir deleted file mode 100644 index 6efd03c35ba..00000000000 --- a/llvm/test/CodeGen/AMDGPU/verifier-implicit-virtreg-invalid-physreg-liveness.mir +++ /dev/null @@ -1,21 +0,0 @@ -# RUN: not llc -mtriple=amdgcn-amd-amdhsa -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERROR %s - -# When the verifier was detecting the invalid liveness for vcc, it would assert when trying to iterate the subregisters of the implicit virtual register use. - - -# ERROR: *** Bad machine code: Using an undefined physical register *** -# ERROR: instruction: S_ENDPGM implicit %0:vgpr_32, implicit $vcc -# ERROR: operand 1: implicit $vcc - -... - -name: invalid_implicit_physreg_use_with_implicit_virtreg -tracksRegLiveness: true - -body: | - bb.0: - %0:vgpr_32 = IMPLICIT_DEF - S_ENDPGM implicit %0, implicit $vcc - -... - diff --git a/llvm/test/CodeGen/AMDGPU/verifier-pseudo-terminators.mir b/llvm/test/CodeGen/AMDGPU/verifier-pseudo-terminators.mir deleted file mode 100644 index d9e8aa71f32..00000000000 --- a/llvm/test/CodeGen/AMDGPU/verifier-pseudo-terminators.mir +++ /dev/null @@ -1,23 +0,0 @@ -# RUN: not llc -march=amdgcn -run-pass=verify %s 2>&1 | FileCheck %s -# Make sure that mismatched successors are caught when a _term -# instruction is used - -# CHECK: *** Bad machine code: MBB exits via unconditional branch but the CFG successor doesn't match the actual successor! *** - ---- -name: verifier_pseudo_terminators -body: | - bb.0: - successors: %bb.1 - - %0:sreg_64 = S_XOR_B64_term undef %1:sreg_64, undef %2:sreg_64, implicit-def $scc - $exec = S_MOV_B64_term %0 - S_BRANCH %bb.2 - - bb.1: - S_SETPC_B64_return undef $sgpr30_sgpr31 - - bb.2: - S_SETPC_B64_return undef $sgpr30_sgpr31 - -... |
