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authorChandler Carruth <chandlerc@gmail.com>2014-09-24 03:06:34 +0000
committerChandler Carruth <chandlerc@gmail.com>2014-09-24 03:06:34 +0000
commitedf50212df7ca9dfbb96668324652933c4306b31 (patch)
tree1184b4818f36894fbeec90083e73c535ab2339f5 /llvm/lib
parentab8b37a9d2178543ea7402704dc9c183979101a3 (diff)
downloadbcm5719-llvm-edf50212df7ca9dfbb96668324652933c4306b31.tar.gz
bcm5719-llvm-edf50212df7ca9dfbb96668324652933c4306b31.zip
[x86] Bypass the shuffle mask comment generation when not using verbose
asm. This can be somewhat expensive and there is no reason to do it outside of tests or debugging sessions. I'm also likely to make it significantly more expensive to support more styles of shuffles. llvm-svn: 218362
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/X86/X86MCInstLower.cpp2
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86MCInstLower.cpp b/llvm/lib/Target/X86/X86MCInstLower.cpp
index e6f06057377..3c5c3c9127c 100644
--- a/llvm/lib/Target/X86/X86MCInstLower.cpp
+++ b/llvm/lib/Target/X86/X86MCInstLower.cpp
@@ -1121,6 +1121,8 @@ void X86AsmPrinter::EmitInstruction(const MachineInstr *MI) {
case X86::VPERMILPDrm:
case X86::VPERMILPSYrm:
case X86::VPERMILPDYrm: {
+ if (!OutStreamer.isVerboseAsm())
+ break;
// All of these instructions accept a constant pool operand as their fifth.
assert(MI->getNumOperands() > 5 &&
"We should always have at least 5 operands!");
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