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| author | Oliver Cruickshank <oliver.cruickshank@arm.com> | 2019-09-16 15:20:03 +0000 |
|---|---|---|
| committer | Oliver Cruickshank <oliver.cruickshank@arm.com> | 2019-09-16 15:20:03 +0000 |
| commit | e9510a6cadb1aeb407184514803065413f8dd7bf (patch) | |
| tree | 73f3741f724507f5ac10e3d4d4122257edbbf9fb /llvm/lib | |
| parent | 5f799ef1627f6f4f548f411a40fb94c620af25b6 (diff) | |
| download | bcm5719-llvm-e9510a6cadb1aeb407184514803065413f8dd7bf.tar.gz bcm5719-llvm-e9510a6cadb1aeb407184514803065413f8dd7bf.zip | |
[ARM] Add patterns for bitreverse intrinsic on MVE
BITREVERSE can use the VBRSR which will reverse and right shift.
Shifting right by 0 will just reverse the bits.
llvm-svn: 372001
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMISelLowering.cpp | 1 | ||||
| -rw-r--r-- | llvm/lib/Target/ARM/ARMInstrMVE.td | 11 |
2 files changed, 12 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp index d8e3b0973b9..c5848c95094 100644 --- a/llvm/lib/Target/ARM/ARMISelLowering.cpp +++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp @@ -263,6 +263,7 @@ void ARMTargetLowering::addMVEVectorTypes(bool HasMVEFP) { setOperationAction(ISD::MSTORE, VT, Legal); setOperationAction(ISD::CTLZ, VT, Legal); setOperationAction(ISD::CTTZ, VT, Expand); + setOperationAction(ISD::BITREVERSE, VT, Legal); // No native support for these. setOperationAction(ISD::UDIV, VT, Expand); diff --git a/llvm/lib/Target/ARM/ARMInstrMVE.td b/llvm/lib/Target/ARM/ARMInstrMVE.td index aa12d507ecf..b931dd01d29 100644 --- a/llvm/lib/Target/ARM/ARMInstrMVE.td +++ b/llvm/lib/Target/ARM/ARMInstrMVE.td @@ -3772,6 +3772,17 @@ def MVE_VBRSR8 : MVE_VBRSR<"vbrsr", "8", 0b00>; def MVE_VBRSR16 : MVE_VBRSR<"vbrsr", "16", 0b01>; def MVE_VBRSR32 : MVE_VBRSR<"vbrsr", "32", 0b10>; +let Predicates = [HasMVEInt] in { + def : Pat<(v16i8 ( bitreverse (v16i8 MQPR:$val1))), + (v16i8 ( MVE_VBRSR8 (v16i8 MQPR:$val1), (t2MOVi (i32 8)) ))>; + + def : Pat<(v4i32 ( bitreverse (v4i32 MQPR:$val1))), + (v4i32 ( MVE_VBRSR32 (v4i32 MQPR:$val1), (t2MOVi (i32 32)) ))>; + + def : Pat<(v8i16 ( bitreverse (v8i16 MQPR:$val1))), + (v8i16 ( MVE_VBRSR16 (v8i16 MQPR:$val1), (t2MOVi (i32 16)) ))>; +} + class MVE_VMUL_qr_int<string iname, string suffix, bits<2> size, list<dag> pattern=[]> : MVE_qDest_rSrc<iname, suffix, "", pattern> { |
