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authorEric Christopher <echristo@apple.com>2010-11-03 20:21:17 +0000
committerEric Christopher <echristo@apple.com>2010-11-03 20:21:17 +0000
commite4dd7378d005bff29b166ffe5f3aa92462f39773 (patch)
tree2990622315108e2f91058931be0b17dbac695ea1 /llvm/lib
parent896cf0488594117a7269d902125ca2f9116e70ef (diff)
downloadbcm5719-llvm-e4dd7378d005bff29b166ffe5f3aa92462f39773.tar.gz
bcm5719-llvm-e4dd7378d005bff29b166ffe5f3aa92462f39773.zip
Optimize generated code for integer materialization a bit.
llvm-svn: 118192
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/ARM/ARMFastISel.cpp14
1 files changed, 13 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMFastISel.cpp b/llvm/lib/Target/ARM/ARMFastISel.cpp
index 0982ca05a93..cf4d61e55d2 100644
--- a/llvm/lib/Target/ARM/ARMFastISel.cpp
+++ b/llvm/lib/Target/ARM/ARMFastISel.cpp
@@ -434,6 +434,19 @@ unsigned ARMFastISel::ARMMaterializeInt(const Constant *C, EVT VT) {
// For now 32-bit only.
if (VT != MVT::i32) return false;
+ unsigned DestReg = createResultReg(TLI.getRegClassFor(VT));
+
+ // If we can do this in a single instruction without a constant pool entry
+ // do so now.
+ const ConstantInt *CI = cast<ConstantInt>(C);
+ if (isUInt<16>(CI->getSExtValue())) {
+ unsigned Opc = isThumb ? ARM::t2MOVi16 : ARM::MOVi16;
+ AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
+ TII.get(Opc), DestReg)
+ .addImm(CI->getSExtValue()));
+ return DestReg;
+ }
+
// MachineConstantPool wants an explicit alignment.
unsigned Align = TD.getPrefTypeAlignment(C->getType());
if (Align == 0) {
@@ -441,7 +454,6 @@ unsigned ARMFastISel::ARMMaterializeInt(const Constant *C, EVT VT) {
Align = TD.getTypeAllocSize(C->getType());
}
unsigned Idx = MCP.getConstantPoolIndex(C, Align);
- unsigned DestReg = createResultReg(TLI.getRegClassFor(VT));
if (isThumb)
AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
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