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| author | Craig Topper <craig.topper@gmail.com> | 2012-08-11 22:34:26 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2012-08-11 22:34:26 +0000 |
| commit | b5bcf58ba104e754ffa8c63156320b5220496bfd (patch) | |
| tree | 6f5a5a18562ac8b5f1d8c59899bb0a414c21561f /llvm/lib | |
| parent | 59c8b411e0cd391fc198e4ec23049e2ccbf84a02 (diff) | |
| download | bcm5719-llvm-b5bcf58ba104e754ffa8c63156320b5220496bfd.tar.gz bcm5719-llvm-b5bcf58ba104e754ffa8c63156320b5220496bfd.zip | |
Move setOperationAction for CONCAT_VECTORS for 256-bit vectors into loop since all 256-bit types are supported.
llvm-svn: 161730
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 9 |
1 files changed, 2 insertions, 7 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index c2a81c984ff..af1675b4d94 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -1043,13 +1043,6 @@ X86TargetLowering::X86TargetLowering(X86TargetMachine &TM) setOperationAction(ISD::SINT_TO_FP, MVT::v8i32, Legal); setOperationAction(ISD::FP_ROUND, MVT::v4f32, Legal); - setOperationAction(ISD::CONCAT_VECTORS, MVT::v4f64, Custom); - setOperationAction(ISD::CONCAT_VECTORS, MVT::v4i64, Custom); - setOperationAction(ISD::CONCAT_VECTORS, MVT::v8f32, Custom); - setOperationAction(ISD::CONCAT_VECTORS, MVT::v8i32, Custom); - setOperationAction(ISD::CONCAT_VECTORS, MVT::v32i8, Custom); - setOperationAction(ISD::CONCAT_VECTORS, MVT::v16i16, Custom); - setOperationAction(ISD::SRL, MVT::v16i16, Custom); setOperationAction(ISD::SRL, MVT::v32i8, Custom); @@ -1081,6 +1074,7 @@ X86TargetLowering::X86TargetLowering(X86TargetMachine &TM) setOperationAction(ISD::FMA, MVT::f32, Custom); setOperationAction(ISD::FMA, MVT::f64, Custom); } + if (Subtarget->hasAVX2()) { setOperationAction(ISD::ADD, MVT::v4i64, Legal); setOperationAction(ISD::ADD, MVT::v8i32, Legal); @@ -1152,6 +1146,7 @@ X86TargetLowering::X86TargetLowering(X86TargetMachine &TM) setOperationAction(ISD::EXTRACT_VECTOR_ELT, SVT, Custom); setOperationAction(ISD::SCALAR_TO_VECTOR, SVT, Custom); setOperationAction(ISD::INSERT_SUBVECTOR, SVT, Custom); + setOperationAction(ISD::CONCAT_VECTORS, SVT, Custom); } // Promote v32i8, v16i16, v8i32 select, and, or, xor to v4i64. |
