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| author | Craig Topper <craig.topper@intel.com> | 2018-07-22 19:44:35 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-07-22 19:44:35 +0000 |
| commit | b2a626b52e1bb9afc15423a05b6660ffe362da23 (patch) | |
| tree | 7d54cfa19e4c2b42fc635a9bfa0342007e6def78 /llvm/lib | |
| parent | 7f288269f008ca23d0038e9e2c79d07d283b848e (diff) | |
| download | bcm5719-llvm-b2a626b52e1bb9afc15423a05b6660ffe362da23.tar.gz bcm5719-llvm-b2a626b52e1bb9afc15423a05b6660ffe362da23.zip | |
[X86] Remove the max vector width restriction from combineLoopMAddPattern and rely splitOpsAndApply to handle splitting.
This seems to be a net improvement. There's still an issue under avx512f where we have a 512-bit vpaddd, but not vpmaddwd so we end up doing two 256-bit vpmaddwds and inserting the results before a 512-bit vpaddd. It might be better to do two 512-bits paddds with zeros in the upper half. Same number of instructions, but breaks a dependency.
llvm-svn: 337656
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 8 |
1 files changed, 1 insertions, 7 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index f17e4bfbf3b..ed34aeaccd8 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -38559,15 +38559,9 @@ static SDValue combineLoopMAddPattern(SDNode *N, SelectionDAG &DAG, EVT VT = N->getValueType(0); - unsigned RegSize = 128; - if (Subtarget.useBWIRegs()) - RegSize = 512; - else if (Subtarget.hasAVX()) - RegSize = 256; - unsigned VectorSize = VT.getVectorNumElements() * 16; // If the vector size is less than 128, or greater than the supported RegSize, // do not use PMADD. - if (VectorSize < 128 || VectorSize > RegSize) + if (VT.getVectorNumElements() < 8) return SDValue(); SDLoc DL(N); |

