summaryrefslogtreecommitdiffstats
path: root/llvm/lib
diff options
context:
space:
mode:
authorCraig Topper <craig.topper@intel.com>2017-11-22 20:05:54 +0000
committerCraig Topper <craig.topper@intel.com>2017-11-22 20:05:54 +0000
commit8ad818656af9f9589cde108fae5d423b5343930d (patch)
treeed7468b0535e0f8e2d69ead44c0f372a2cc49121 /llvm/lib
parente15cc1687399749e0ff7c1bd38850e02dbc8f090 (diff)
downloadbcm5719-llvm-8ad818656af9f9589cde108fae5d423b5343930d.tar.gz
bcm5719-llvm-8ad818656af9f9589cde108fae5d423b5343930d.zip
[X86] Move the BITALG setOperationAction code into the hasBWI section to match what is done for VPOPCNTDQ in the AVX512F block. NFC
llvm-svn: 318870
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/X86/X86ISelLowering.cpp11
1 files changed, 6 insertions, 5 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 80519e5aa52..8e9658853dd 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -1522,6 +1522,12 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
for (auto ExtType : {ISD::ZEXTLOAD, ISD::SEXTLOAD}) {
setLoadExtAction(ExtType, MVT::v32i16, MVT::v32i8, Legal);
}
+
+ if (Subtarget.hasBITALG()) {
+ for (auto VT : { MVT::v64i8, MVT::v32i16, MVT::v32i8,
+ MVT::v16i16, MVT::v16i8, MVT::v8i16 })
+ setOperationAction(ISD::CTPOP, VT, Legal);
+ }
}
if (!Subtarget.useSoftFloat() && Subtarget.hasVLX()) {
@@ -1556,11 +1562,6 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
}
}
- if (Subtarget.hasBITALG())
- for (auto VT : { MVT::v64i8, MVT::v32i16, MVT::v32i8,
- MVT::v16i16, MVT::v16i8, MVT::v8i16 })
- setOperationAction(ISD::CTPOP, VT, Legal);
-
// We want to custom lower some of our intrinsics.
setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::Other, Custom);
setOperationAction(ISD::INTRINSIC_W_CHAIN, MVT::Other, Custom);
OpenPOWER on IntegriCloud