Drop graph_ prefix

llvm-svn: 294621

6 files changed, 10 insertions, 10 deletions

diff --git a/llvm/lib/Analysis/IteratedDominanceFrontier.cpp b/llvm/lib/Analysis/IteratedDominanceFrontier.cpp
index 27249664bce..2a736ec0379 100644
--- a/llvm/lib/Analysis/IteratedDominanceFrontier.cpp
+++ b/llvm/lib/Analysis/IteratedDominanceFrontier.cpp
@@ -64,7 +64,7 @@ void IDFCalculator<NodeTy>::calculate(
       BasicBlock *BB = Node->getBlock();
       // Succ is the successor in the direction we are calculating IDF, so it is
       // successor for IDF, and predecessor for Reverse IDF.
-      for (auto *Succ : graph_children<NodeTy>(BB)) {
+      for (auto *Succ : children<NodeTy>(BB)) {
         DomTreeNode *SuccNode = DT.getNode(Succ);
 
         // Quickly skip all CFG edges that are also dominator tree edges instead
diff --git a/llvm/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp b/llvm/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp
index e83faea6c05..d150984f882 100644
--- a/llvm/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp
@@ -912,7 +912,7 @@ void AMDGPUCFGStructurizer::orderBlocks(MachineFunction *MF) {
   }
 
   // walk through all the block in func to check for unreachable
-  for (auto *MBB : graph_nodes(MF)) {
+  for (auto *MBB : nodes(MF)) {
     SccNum = getSCCNum(MBB);
     if (SccNum == INVALIDSCCNUM)
       dbgs() << "unreachable block BB" << MBB->getNumber() << "\n";
@@ -1078,7 +1078,7 @@ int AMDGPUCFGStructurizer::mergeLoop(MachineLoop *LoopRep) {
   MachineBasicBlock *ExitBlk = *ExitBlks.begin();
   assert(ExitBlk && "Loop has several exit block");
   MBBVector LatchBlks;
-  for (auto *LB : inverse_graph_children<MachineBasicBlock*>(LoopHeader))
+  for (auto *LB : inverse_children<MachineBasicBlock*>(LoopHeader))
     if (LoopRep->contains(LB))
       LatchBlks.push_back(LB);
 
diff --git a/llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp b/llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp
index 895889ce4c2..fda7f7fd884 100644
--- a/llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp
@@ -260,7 +260,7 @@ bool HexagonBitSimplify::visitBlock(MachineBasicBlock &B, Transformation &T,
   RegisterSet NewAVs = AVs;
   NewAVs.insert(Defs);
 
-  for (auto *DTN : graph_children<MachineDomTreeNode*>(MDT->getNode(&B)))
+  for (auto *DTN : children<MachineDomTreeNode*>(MDT->getNode(&B)))
     Changed |= visitBlock(*(DTN->getBlock()), T, NewAVs);
 
   if (!T.TopDown)
@@ -982,7 +982,7 @@ bool DeadCodeElimination::isDead(unsigned R) const {
 bool DeadCodeElimination::runOnNode(MachineDomTreeNode *N) {
   bool Changed = false;
 
-  for (auto *DTN : graph_children<MachineDomTreeNode*>(N))
+  for (auto *DTN : children<MachineDomTreeNode*>(N))
     Changed |= runOnNode(DTN);
 
   MachineBasicBlock *B = N->getBlock();
diff --git a/llvm/lib/Target/Hexagon/HexagonCommonGEP.cpp b/llvm/lib/Target/Hexagon/HexagonCommonGEP.cpp
index d3174b2f08b..a07ba77e6f3 100644
--- a/llvm/lib/Target/Hexagon/HexagonCommonGEP.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonCommonGEP.cpp
@@ -315,7 +315,7 @@ void HexagonCommonGEP::getBlockTraversalOrder(BasicBlock *Root,
   // visited".
 
   Order.push_back(Root);
-  for (auto *DTN : graph_children<DomTreeNode*>(DT->getNode(Root)))
+  for (auto *DTN : children<DomTreeNode*>(DT->getNode(Root)))
     getBlockTraversalOrder(DTN->getBlock(), Order);
 }
 
@@ -1232,7 +1232,7 @@ void HexagonCommonGEP::removeDeadCode() {
 
   for (unsigned i = 0; i < BO.size(); ++i) {
     BasicBlock *B = cast<BasicBlock>(BO[i]);
-    for (auto DTN : graph_children<DomTreeNode*>(DT->getNode(B)))
+    for (auto DTN : children<DomTreeNode*>(DT->getNode(B)))
       BO.push_back(DTN->getBlock());
   }
 
diff --git a/llvm/lib/Target/Hexagon/HexagonGenExtract.cpp b/llvm/lib/Target/Hexagon/HexagonGenExtract.cpp
index 7fd52c949f3..f6f3a593428 100644
--- a/llvm/lib/Target/Hexagon/HexagonGenExtract.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonGenExtract.cpp
@@ -221,7 +221,7 @@ bool HexagonGenExtract::convert(Instruction *In) {
 
 bool HexagonGenExtract::visitBlock(BasicBlock *B) {
   // Depth-first, bottom-up traversal.
-  for (auto *DTN : graph_children<DomTreeNode*>(DT->getNode(B)))
+  for (auto *DTN : children<DomTreeNode*>(DT->getNode(B)))
     visitBlock(DTN->getBlock());
 
   // Allow limiting the number of generated extracts for debugging purposes.
diff --git a/llvm/lib/Target/Hexagon/HexagonGenInsert.cpp b/llvm/lib/Target/Hexagon/HexagonGenInsert.cpp
index 60b4fe68eb8..54d99d399f8 100644
--- a/llvm/lib/Target/Hexagon/HexagonGenInsert.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonGenInsert.cpp
@@ -947,7 +947,7 @@ void HexagonGenInsert::collectInBlock(MachineBasicBlock *B,
     BlockDefs.insert(InsDefs);
   }
 
-  for (auto *DTN : graph_children<MachineDomTreeNode*>(MDT->getNode(B))) {
+  for (auto *DTN : children<MachineDomTreeNode*>(MDT->getNode(B))) {
     MachineBasicBlock *SB = DTN->getBlock();
     collectInBlock(SB, AVs);
   }
@@ -1420,7 +1420,7 @@ bool HexagonGenInsert::generateInserts() {
 bool HexagonGenInsert::removeDeadCode(MachineDomTreeNode *N) {
   bool Changed = false;
 
-  for (auto *DTN : graph_children<MachineDomTreeNode*>(N))
+  for (auto *DTN : children<MachineDomTreeNode*>(N))
     Changed |= removeDeadCode(DTN);
 
   MachineBasicBlock *B = N->getBlock();