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authorMichael J. Spencer <bigcheesegs@gmail.com>2010-10-05 06:00:43 +0000
committerMichael J. Spencer <bigcheesegs@gmail.com>2010-10-05 06:00:43 +0000
commit70ac5fa42cd5871180678913bb20aa5e62244720 (patch)
treeb6f8499c54fe8dcb7aa6ddb3be504ead39733a1a /llvm/lib
parente7f00cbb7c746778f834415468a076eaf58acfbe (diff)
downloadbcm5719-llvm-70ac5fa42cd5871180678913bb20aa5e62244720.tar.gz
bcm5719-llvm-70ac5fa42cd5871180678913bb20aa5e62244720.zip
fix MSVC 2010 build.
llvm-svn: 115594
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp3
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
index 2d729bfdca8..0ccf7b6a7c4 100644
--- a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
+++ b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
@@ -1470,7 +1470,8 @@ static bool isSuitableForMask(MachineInstr *&MI, unsigned SrcReg,
case ARM::COPY: {
// Walk down one instruction which is potentially an 'and'.
const MachineInstr &Copy = *MI;
- MachineBasicBlock::iterator AND(next(MachineBasicBlock::iterator(MI)));
+ MachineBasicBlock::iterator AND(
+ llvm::next(MachineBasicBlock::iterator(MI)));
if (AND == MI->getParent()->end()) return false;
MI = AND;
return isSuitableForMask(MI, Copy.getOperand(0).getReg(),
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