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| author | Miloš Stojanović <Milos.Stojanovic@rt-rk.com> | 2019-11-21 15:17:21 +0100 |
|---|---|---|
| committer | Miloš Stojanović <Milos.Stojanovic@rt-rk.com> | 2019-11-21 15:17:21 +0100 |
| commit | 6ba5cbf3ea2315acf1b7f1c39c6fec6cca5560ca (patch) | |
| tree | 95c20ff071ecf3204b1531c5d7d62d68601016cb /llvm/lib | |
| parent | b25f985848767f36dcdcbac213ddb03bcdab617a (diff) | |
| download | bcm5719-llvm-6ba5cbf3ea2315acf1b7f1c39c6fec6cca5560ca.tar.gz bcm5719-llvm-6ba5cbf3ea2315acf1b7f1c39c6fec6cca5560ca.zip | |
[mips] Add a 'generic' Mips CPU
Having a generic CPU removes a warning when creating a subtarget without
the CPU being explicitly specified.
Differential Revision: https://reviews.llvm.org/D70490
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/Mips/Mips.td | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/lib/Target/Mips/Mips.td b/llvm/lib/Target/Mips/Mips.td index a0569ed1b6a..b8a69815cc1 100644 --- a/llvm/lib/Target/Mips/Mips.td +++ b/llvm/lib/Target/Mips/Mips.td @@ -232,6 +232,7 @@ def ImplP5600 : SubtargetFeature<"p5600", "ProcImpl", class Proc<string Name, list<SubtargetFeature> Features> : ProcessorModel<Name, MipsGenericModel, Features>; +def : Proc<"generic", [FeatureMips32]>; def : Proc<"mips1", [FeatureMips1]>; def : Proc<"mips2", [FeatureMips2]>; def : Proc<"mips32", [FeatureMips32]>; |
