diff options
| author | Chris Lattner <sabre@nondot.org> | 2005-04-04 21:35:34 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2005-04-04 21:35:34 +0000 |
| commit | 6a6056e93d4e2e73ebf629966acaf2a203a3cea3 (patch) | |
| tree | 51153692b0622af30fcbc5f7c5b5072111857676 /llvm/lib | |
| parent | d7537654608e9d78e344de2345185e57098bdde7 (diff) | |
| download | bcm5719-llvm-6a6056e93d4e2e73ebf629966acaf2a203a3cea3.tar.gz bcm5719-llvm-6a6056e93d4e2e73ebf629966acaf2a203a3cea3.zip | |
Make sure to notice that explicit physregs are used in the function
llvm-svn: 21084
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/CodeGen/VirtRegMap.cpp | 52 |
1 files changed, 29 insertions, 23 deletions
diff --git a/llvm/lib/CodeGen/VirtRegMap.cpp b/llvm/lib/CodeGen/VirtRegMap.cpp index 62f6274d67a..b9925e2b20d 100644 --- a/llvm/lib/CodeGen/VirtRegMap.cpp +++ b/llvm/lib/CodeGen/VirtRegMap.cpp @@ -157,31 +157,34 @@ bool SimpleSpiller::runOnMachineFunction(MachineFunction &MF, MachineInstr &MI = *MII; for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) { MachineOperand &MO = MI.getOperand(i); - if (MO.isRegister() && MO.getReg() && - MRegisterInfo::isVirtualRegister(MO.getReg())) { - unsigned VirtReg = MO.getReg(); - unsigned PhysReg = VRM.getPhys(VirtReg); - if (VRM.hasStackSlot(VirtReg)) { - int StackSlot = VRM.getStackSlot(VirtReg); - - if (MO.isUse() && - std::find(LoadedRegs.begin(), LoadedRegs.end(), VirtReg) - == LoadedRegs.end()) { - MRI.loadRegFromStackSlot(MBB, &MI, PhysReg, StackSlot); - LoadedRegs.push_back(VirtReg); - ++NumLoads; - DEBUG(std::cerr << '\t' << *prior(MII)); - } - - if (MO.isDef()) { - MRI.storeRegToStackSlot(MBB, next(MII), PhysReg, StackSlot); - ++NumStores; + if (MO.isRegister() && MO.getReg()) + if (MRegisterInfo::isVirtualRegister(MO.getReg())) { + unsigned VirtReg = MO.getReg(); + unsigned PhysReg = VRM.getPhys(VirtReg); + if (VRM.hasStackSlot(VirtReg)) { + int StackSlot = VRM.getStackSlot(VirtReg); + + if (MO.isUse() && + std::find(LoadedRegs.begin(), LoadedRegs.end(), VirtReg) + == LoadedRegs.end()) { + MRI.loadRegFromStackSlot(MBB, &MI, PhysReg, StackSlot); + LoadedRegs.push_back(VirtReg); + ++NumLoads; + DEBUG(std::cerr << '\t' << *prior(MII)); + } + + if (MO.isDef()) { + MRI.storeRegToStackSlot(MBB, next(MII), PhysReg, StackSlot); + ++NumStores; + } } + PhysRegsUsed[PhysReg] = true; + MI.SetMachineOperandReg(i, PhysReg); + } else { + PhysRegsUsed[MO.getReg()] = true; } - PhysRegsUsed[PhysReg] = true; - MI.SetMachineOperandReg(i, PhysReg); - } } + DEBUG(std::cerr << '\t' << MI); LoadedRegs.clear(); } @@ -312,7 +315,10 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, const VirtRegMap &VRM) { for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) { MachineOperand &MO = MI.getOperand(i); if (MO.isRegister() && MO.getReg() && - MRegisterInfo::isVirtualRegister(MO.getReg())) { + MRegisterInfo::isPhysicalRegister(MO.getReg())) + PhysRegsUsed[MO.getReg()] = true; + else if (MO.isRegister() && MO.getReg() && + MRegisterInfo::isVirtualRegister(MO.getReg())) { unsigned VirtReg = MO.getReg(); if (!VRM.hasStackSlot(VirtReg)) { |
