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| author | Vikram S. Adve <vadve@cs.uiuc.edu> | 2001-09-30 23:46:57 +0000 |
|---|---|---|
| committer | Vikram S. Adve <vadve@cs.uiuc.edu> | 2001-09-30 23:46:57 +0000 |
| commit | 40378e32cd80f9436b7a7f2c8b9eacd4e73ce611 (patch) | |
| tree | 901ffc45f83d10e416135f88dbb2fd6955286288 /llvm/lib | |
| parent | 813ffcc4f68fbf0b70e8ebfedddafb15cbf236e8 (diff) | |
| download | bcm5719-llvm-40378e32cd80f9436b7a7f2c8b9eacd4e73ce611.tar.gz bcm5719-llvm-40378e32cd80f9436b7a7f2c8b9eacd4e73ce611.zip | |
Change latency of setuw and setsw to 2 cycles.
llvm-svn: 681
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/Sparc/SparcInstr.def | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/llvm/lib/Target/Sparc/SparcInstr.def b/llvm/lib/Target/Sparc/SparcInstr.def index e4fae4d7ef1..13efaa33ae7 100644 --- a/llvm/lib/Target/Sparc/SparcInstr.def +++ b/llvm/lib/Target/Sparc/SparcInstr.def @@ -38,16 +38,17 @@ // instr class flags (defined in MachineInstrInfo.h) -I(NOP, "nop", 0, -1, 0, false, 0, 1, SPARC_NONE, M_NOP_FLAG) +I(NOP, "nop", 0, -1, 0, false, 0, 1, SPARC_NONE, M_NOP_FLAG) // Synthetic SPARC assembly opcodes for setting a register to a constant. // Max immediate constant should be ignored for both these instructions. -I(SETSW, "setsw", 2, 1, 0, true , 0, 1, SPARC_IEUN, M_INT_FLAG | M_ARITH_FLAG) -I(SETUW, "setuw", 2, 1, 0, false, 0, 1, SPARC_IEUN, M_INT_FLAG | M_LOGICAL_FLAG | M_ARITH_FLAG) +// Use a latency > 1 since this may generate as many as 3 instructions. +I(SETSW, "setsw", 2, 1, 0, true , 0, 2, SPARC_IEUN, M_INT_FLAG | M_ARITH_FLAG) +I(SETUW, "setuw", 2, 1, 0, false, 0, 2, SPARC_IEUN, M_INT_FLAG | M_LOGICAL_FLAG | M_ARITH_FLAG) // Set high-order bits of register and clear low-order bits I(SETHI, "sethi", 2, 1, B22, false, 0, 1, SPARC_IEUN, M_INT_FLAG | M_LOGICAL_FLAG | M_ARITH_FLAG) - + // Add or add with carry. // Immed bit specifies if second operand is immediate(1) or register(0) I(ADD , "add", 3, 2, B12, true , 0, 1, SPARC_IEUN, M_INT_FLAG | M_ARITH_FLAG) |
