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authorTom Stellard <thomas.stellard@amd.com>2014-05-16 20:56:43 +0000
committerTom Stellard <thomas.stellard@amd.com>2014-05-16 20:56:43 +0000
commit26713384979d6fa06b3b933fe95d8e6db1c2bd4b (patch)
treeb4b4c38057fa4df56878634050ca33b717d64075 /llvm/lib
parentf719ee9e767341eacf4f74dba0acf0fdf36821bc (diff)
downloadbcm5719-llvm-26713384979d6fa06b3b933fe95d8e6db1c2bd4b.tar.gz
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R600/SI: Remove unused instruction
llvm-svn: 209025
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/R600/SIInstructions.td7
1 files changed, 0 insertions, 7 deletions
diff --git a/llvm/lib/Target/R600/SIInstructions.td b/llvm/lib/Target/R600/SIInstructions.td
index 482295c26e7..66166a12e6f 100644
--- a/llvm/lib/Target/R600/SIInstructions.td
+++ b/llvm/lib/Target/R600/SIInstructions.td
@@ -1407,13 +1407,6 @@ def V_OR_I1 : InstSI <
[(set i1:$dst, (or i1:$src0, i1:$src1))]
>;
-def LOAD_CONST : AMDGPUShaderInst <
- (outs GPRF32:$dst),
- (ins i32imm:$src),
- "LOAD_CONST $dst, $src",
- [(set GPRF32:$dst, (int_AMDGPU_load_const imm:$src))]
->;
-
// SI pseudo instructions. These are used by the CFG structurizer pass
// and should be lowered to ISA instructions prior to codegen.
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