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| author | Evan Cheng <evan.cheng@apple.com> | 2008-06-16 22:52:53 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2008-06-16 22:52:53 +0000 |
| commit | 1cde1f8d5e893678b1aabe0ef219adf9ad05019e (patch) | |
| tree | 2d5728cfbb62c7cc395ea228b2a797ec95195b90 /llvm/lib | |
| parent | 51ca6fa51279483a75b057cb8d2a0e9b35886bb3 (diff) | |
| download | bcm5719-llvm-1cde1f8d5e893678b1aabe0ef219adf9ad05019e.tar.gz bcm5719-llvm-1cde1f8d5e893678b1aabe0ef219adf9ad05019e.zip | |
Do not issue identity copies.
llvm-svn: 52373
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/CodeGen/LowerSubregs.cpp | 35 |
1 files changed, 22 insertions, 13 deletions
diff --git a/llvm/lib/CodeGen/LowerSubregs.cpp b/llvm/lib/CodeGen/LowerSubregs.cpp index 0710a353006..296e6d45c34 100644 --- a/llvm/lib/CodeGen/LowerSubregs.cpp +++ b/llvm/lib/CodeGen/LowerSubregs.cpp @@ -108,15 +108,20 @@ bool LowerSubregsInstructionPass::LowerSubregToReg(MachineInstr *MI) { DOUT << "subreg: CONVERTING: " << *MI; - // Insert sub-register copy - const TargetRegisterClass *TRC0 = TRI.getPhysicalRegisterRegClass(DstSubReg); - const TargetRegisterClass *TRC1 = TRI.getPhysicalRegisterRegClass(InsReg); - TII.copyRegToReg(*MBB, MI, DstSubReg, InsReg, TRC0, TRC1); + if (DstSubReg == InsReg) { + // No need to insert an identify copy instruction. + DOUT << "subreg: eliminated!"; + } else { + // Insert sub-register copy + const TargetRegisterClass *TRC0= TRI.getPhysicalRegisterRegClass(DstSubReg); + const TargetRegisterClass *TRC1= TRI.getPhysicalRegisterRegClass(InsReg); + TII.copyRegToReg(*MBB, MI, DstSubReg, InsReg, TRC0, TRC1); #ifndef NDEBUG - MachineBasicBlock::iterator dMI = MI; - DOUT << "subreg: " << *(--dMI); + MachineBasicBlock::iterator dMI = MI; + DOUT << "subreg: " << *(--dMI); #endif + } DOUT << "\n"; MBB->remove(MI); @@ -149,15 +154,19 @@ bool LowerSubregsInstructionPass::LowerInsert(MachineInstr *MI) { DOUT << "subreg: CONVERTING: " << *MI; - // Insert sub-register copy - const TargetRegisterClass *TRC0 = TRI.getPhysicalRegisterRegClass(DstSubReg); - const TargetRegisterClass *TRC1 = TRI.getPhysicalRegisterRegClass(InsReg); - TII.copyRegToReg(*MBB, MI, DstSubReg, InsReg, TRC0, TRC1); - + if (DstSubReg == InsReg) { + // No need to insert an identify copy instruction. + DOUT << "subreg: eliminated!"; + } else { + // Insert sub-register copy + const TargetRegisterClass *TRC0= TRI.getPhysicalRegisterRegClass(DstSubReg); + const TargetRegisterClass *TRC1= TRI.getPhysicalRegisterRegClass(InsReg); + TII.copyRegToReg(*MBB, MI, DstSubReg, InsReg, TRC0, TRC1); #ifndef NDEBUG - MachineBasicBlock::iterator dMI = MI; - DOUT << "subreg: " << *(--dMI); + MachineBasicBlock::iterator dMI = MI; + DOUT << "subreg: " << *(--dMI); #endif + } DOUT << "\n"; MBB->remove(MI); |
