diff options
| author | Pirama Arumuga Nainar <pirama@google.com> | 2015-03-17 23:10:29 +0000 |
|---|---|---|
| committer | Pirama Arumuga Nainar <pirama@google.com> | 2015-03-17 23:10:29 +0000 |
| commit | 12aeefc63b0c5aa3d918afbc5e2b40958218c631 (patch) | |
| tree | 0eb55a51e4a5912eec97b2e3d1d8ff6ec633c103 /llvm/lib | |
| parent | c085eca17626f117018500eb4d67368c4ada87f7 (diff) | |
| download | bcm5719-llvm-12aeefc63b0c5aa3d918afbc5e2b40958218c631.tar.gz bcm5719-llvm-12aeefc63b0c5aa3d918afbc5e2b40958218c631.zip | |
Fix bug while building FP16 constant vectors for AArch64
Summary: Building FP16 constant vectors caused the FP16 data to be bitcast to i64. This patch creates a BITCAST node with the correct value, and adds a test to verify correct handling.
Reviewers: mcrosier
Reviewed By: mcrosier
Subscribers: mcrosier, jmolloy, ab, srhines, llvm-commits, rengolin, aemerson
Differential Revision: http://reviews.llvm.org/D8369
llvm-svn: 232562
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp index 464f56780df..93387b00e22 100644 --- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp +++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp @@ -5892,8 +5892,10 @@ FailedModImm: if (VT.getVectorElementType().isFloatingPoint()) { SmallVector<SDValue, 8> Ops; - MVT NewType = - (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64; + EVT EltTy = VT.getVectorElementType(); + assert ((EltTy == MVT::f16 || EltTy == MVT::f32 || EltTy == MVT::f64) && + "Unsupported floating-point vector type"); + MVT NewType = MVT::getIntegerVT(EltTy.getSizeInBits()); for (unsigned i = 0; i < NumElts; ++i) Ops.push_back(DAG.getNode(ISD::BITCAST, dl, NewType, Op.getOperand(i))); EVT VecVT = EVT::getVectorVT(*DAG.getContext(), NewType, NumElts); |

