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authorJunmo Park <junmoz.park@samsung.com>2016-06-21 08:09:58 +0000
committerJunmo Park <junmoz.park@samsung.com>2016-06-21 08:09:58 +0000
commit118119233d6a1f75114c070c4d290c940464d542 (patch)
tree2ca21d441ac8ec1471a4589c30f7a190dacf95e8 /llvm/lib
parent283418fbb6fe716460c7d514573de65cc8873e7c (diff)
downloadbcm5719-llvm-118119233d6a1f75114c070c4d290c940464d542.tar.gz
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[TargetSchedule] Use 'isOutOfOrder' as possible to avoid magic number. NFC.
Summary: Using isOutOfOrder makes the code more clear. Reviewers: rengolin, atrick, hfinkel. Differential Revision: http://reviews.llvm.org/D21548 llvm-svn: 273255
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/CodeGen/TargetSchedule.cpp5
1 files changed, 2 insertions, 3 deletions
diff --git a/llvm/lib/CodeGen/TargetSchedule.cpp b/llvm/lib/CodeGen/TargetSchedule.cpp
index f5181a362d7..19300070dfb 100644
--- a/llvm/lib/CodeGen/TargetSchedule.cpp
+++ b/llvm/lib/CodeGen/TargetSchedule.cpp
@@ -267,11 +267,10 @@ TargetSchedModel::computeInstrLatency(const MachineInstr *MI,
unsigned TargetSchedModel::
computeOutputLatency(const MachineInstr *DefMI, unsigned DefOperIdx,
const MachineInstr *DepMI) const {
- if (SchedModel.MicroOpBufferSize <= 1)
+ if (!SchedModel.isOutOfOrder())
return 1;
- // MicroOpBufferSize > 1 indicates an out-of-order processor that can dispatch
- // WAW dependencies in the same cycle.
+ // Out-of-order processor can dispatch WAW dependencies in the same cycle.
// Treat predication as a data dependency for out-of-order cpus. In-order
// cpus do not need to treat predicated writes specially.
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