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| author | Craig Topper <craig.topper@intel.com> | 2019-08-09 03:08:54 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2019-08-09 03:08:54 +0000 |
| commit | 0bd44d59dba1c9fbb8fcd62912e83929a5d43a43 (patch) | |
| tree | 773bace80d023b1961ecb61bd971701ca436515d /llvm/lib | |
| parent | cdb9a8ebd80638f2e67f3803cbafdc75308ecfe1 (diff) | |
| download | bcm5719-llvm-0bd44d59dba1c9fbb8fcd62912e83929a5d43a43.tar.gz bcm5719-llvm-0bd44d59dba1c9fbb8fcd62912e83929a5d43a43.zip | |
[X86] Simplify ReplaceNodeResults handling for SIGN_EXTEND/ZERO_EXTEND/TRUNCATE for vectors to only handle widening.
llvm-svn: 368386
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 2efa01156bb..b9c93ad335d 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -27633,8 +27633,8 @@ void X86TargetLowering::ReplaceNodeResults(SDNode *N, } case ISD::TRUNCATE: { MVT VT = N->getSimpleValueType(0); - if (getTypeAction(*DAG.getContext(), VT) != TypeWidenVector) - return; + assert(getTypeAction(*DAG.getContext(), VT) == TypeWidenVector && + "Unexpected type action!"); // The generic legalizer will try to widen the input type to the same // number of elements as the widened result type. But this isn't always @@ -27688,8 +27688,9 @@ void X86TargetLowering::ReplaceNodeResults(SDNode *N, SDValue In = N->getOperand(0); EVT InVT = In.getValueType(); if (!Subtarget.hasSSE41() && VT == MVT::v4i64 && - (InVT == MVT::v4i16 || InVT == MVT::v4i8) && - getTypeAction(*DAG.getContext(), InVT) == TypeWidenVector) { + (InVT == MVT::v4i16 || InVT == MVT::v4i8)){ + assert(getTypeAction(*DAG.getContext(), InVT) == TypeWidenVector && + "Unexpected type action!"); assert(N->getOpcode() == ISD::SIGN_EXTEND && "Unexpected opcode"); // Custom split this so we can extend i8/i16->i32 invec. This is better // since sign_extend_inreg i8/i16->i64 requires an extend to i32 using |
