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authorNemanja Ivanovic <nemanja.i.ibm@gmail.com>2015-12-15 12:19:34 +0000
committerNemanja Ivanovic <nemanja.i.ibm@gmail.com>2015-12-15 12:19:34 +0000
commitb033f67df0773ccc2565638df3ff3cf9f821629e (patch)
tree38945dab66c956f301a412b8f56df333b1519241 /llvm/lib
parent0ecdae1bdca95fb69985fac0dbf9332b0df759ae (diff)
downloadbcm5719-llvm-b033f67df0773ccc2565638df3ff3cf9f821629e.tar.gz
bcm5719-llvm-b033f67df0773ccc2565638df3ff3cf9f821629e.zip
Define a feature for __float128 support in the PPC back end
This patch corresponds to review: http://reviews.llvm.org/D15117 In preparation for supporting IEEE Quad precision floating point, this patch simply defines a feature to specify the target supports this. For now, nothing is done with the target feature, we just don't want warnings from the Clang FE when a user specifies -mfloat128. Calling convention and other related work will add to this patch in the near future. llvm-svn: 255642
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/PowerPC/PPC.td4
-rw-r--r--llvm/lib/Target/PowerPC/PPCSubtarget.cpp1
-rw-r--r--llvm/lib/Target/PowerPC/PPCSubtarget.h2
3 files changed, 7 insertions, 0 deletions
diff --git a/llvm/lib/Target/PowerPC/PPC.td b/llvm/lib/Target/PowerPC/PPC.td
index f0269112328..b03be12cfd9 100644
--- a/llvm/lib/Target/PowerPC/PPC.td
+++ b/llvm/lib/Target/PowerPC/PPC.td
@@ -141,6 +141,10 @@ def FeatureMFTB : SubtargetFeature<"", "FeatureMFTB", "true",
"Implement mftb using the mfspr instruction">;
def FeatureFusion : SubtargetFeature<"fusion", "HasFusion", "true",
"Target supports add/load integer fusion.">;
+def FeatureFloat128 :
+ SubtargetFeature<"float128", "HasFloat128", "true",
+ "Enable the __float128 data type for IEEE-754R Binary128.",
+ [FeatureVSX]>;
def DeprecatedDST : SubtargetFeature<"", "DeprecatedDST", "true",
"Treat vector data stream cache control instructions as deprecated">;
diff --git a/llvm/lib/Target/PowerPC/PPCSubtarget.cpp b/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
index 89bbcf78346..c0fcb6cbb9d 100644
--- a/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
+++ b/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
@@ -102,6 +102,7 @@ void PPCSubtarget::initializeEnvironment() {
IsQPXStackUnaligned = false;
HasHTM = false;
HasFusion = false;
+ HasFloat128 = false;
}
void PPCSubtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) {
diff --git a/llvm/lib/Target/PowerPC/PPCSubtarget.h b/llvm/lib/Target/PowerPC/PPCSubtarget.h
index a55c0d3a722..4f5c95c1483 100644
--- a/llvm/lib/Target/PowerPC/PPCSubtarget.h
+++ b/llvm/lib/Target/PowerPC/PPCSubtarget.h
@@ -121,6 +121,7 @@ protected:
bool HasDirectMove;
bool HasHTM;
bool HasFusion;
+ bool HasFloat128;
/// When targeting QPX running a stock PPC64 Linux kernel where the stack
/// alignment has not been changed, we need to keep the 16-byte alignment
@@ -259,6 +260,7 @@ public:
}
bool hasHTM() const { return HasHTM; }
bool hasFusion() const { return HasFusion; }
+ bool hasFloat128() const { return HasFloat128; }
const Triple &getTargetTriple() const { return TargetTriple; }
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