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authorAhmed Bougacha <ahmed.bougacha@gmail.com>2016-08-02 15:10:25 +0000
committerAhmed Bougacha <ahmed.bougacha@gmail.com>2016-08-02 15:10:25 +0000
commit0d7b0cb865514a04cf18a220c80d6d0301f339ee (patch)
tree9f1eb37f80b5de039a74af1eeb806dc1b5650349 /llvm/lib
parentcb2bac6e98b23aa8e7fb6741ac08269f34f2475f (diff)
downloadbcm5719-llvm-0d7b0cb865514a04cf18a220c80d6d0301f339ee.tar.gz
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[GlobalISel] Add Legalized MachineFunction property.
Legalized: The MachineLegalizer ran; all pre-isel generic instructions have been legalized, i.e., all instructions are now one of: - generic and always legal (e.g., COPY) - target-specific - legal pre-isel generic instructions. This lets us enforce certain invariants across passes. This property is GlobalISel-specific, but is always available. llvm-svn: 277470
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/CodeGen/MIRParser/MIRParser.cpp4
-rw-r--r--llvm/lib/CodeGen/MIRPrinter.cpp3
-rw-r--r--llvm/lib/CodeGen/MachineFunction.cpp3
3 files changed, 10 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/MIRParser/MIRParser.cpp b/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
index 4d8e4a90d1d..035b0ae5246 100644
--- a/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
+++ b/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
@@ -292,6 +292,10 @@ bool MIRParserImpl::initializeMachineFunction(MachineFunction &MF) {
MF.setHasInlineAsm(YamlMF.HasInlineAsm);
if (YamlMF.AllVRegsAllocated)
MF.getProperties().set(MachineFunctionProperties::Property::AllVRegsAllocated);
+
+ if (YamlMF.Legalized)
+ MF.getProperties().set(MachineFunctionProperties::Property::Legalized);
+
PerFunctionMIParsingState PFS(MF, SM, IRSlots);
if (initializeRegisterInfo(PFS, YamlMF))
return true;
diff --git a/llvm/lib/CodeGen/MIRPrinter.cpp b/llvm/lib/CodeGen/MIRPrinter.cpp
index b42d45b5b5f..fdd7a42ac62 100644
--- a/llvm/lib/CodeGen/MIRPrinter.cpp
+++ b/llvm/lib/CodeGen/MIRPrinter.cpp
@@ -178,6 +178,9 @@ void MIRPrinter::print(const MachineFunction &MF) {
YamlMF.AllVRegsAllocated = MF.getProperties().hasProperty(
MachineFunctionProperties::Property::AllVRegsAllocated);
+ YamlMF.Legalized = MF.getProperties().hasProperty(
+ MachineFunctionProperties::Property::Legalized);
+
convert(YamlMF, MF.getRegInfo(), MF.getSubtarget().getRegisterInfo());
ModuleSlotTracker MST(MF.getFunction()->getParent());
MST.incorporateFunction(*MF.getFunction());
diff --git a/llvm/lib/CodeGen/MachineFunction.cpp b/llvm/lib/CodeGen/MachineFunction.cpp
index a4c4ea4bb95..202cf3cdf03 100644
--- a/llvm/lib/CodeGen/MachineFunction.cpp
+++ b/llvm/lib/CodeGen/MachineFunction.cpp
@@ -76,6 +76,9 @@ void MachineFunctionProperties::print(raw_ostream &ROS, bool OnlySet) const {
case Property::AllVRegsAllocated:
ROS << (HasProperty ? "AllVRegsAllocated" : "HasVRegs");
break;
+ case Property::Legalized:
+ ROS << (HasProperty ? "" : "not ") << "legalized";
+ break;
default:
break;
}
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