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authorBill Wendling <isanbard@gmail.com>2010-12-03 00:53:22 +0000
committerBill Wendling <isanbard@gmail.com>2010-12-03 00:53:22 +0000
commitf0b36a3cfd1ae7f5e85f7c217698e3001b60b313 (patch)
treef3a0dcaf2711a65a96bbcc26f98a8dae278b0df4 /llvm/lib
parent518a6e6879ca0cb6a8d063cc81e4140c674623ec (diff)
downloadbcm5719-llvm-f0b36a3cfd1ae7f5e85f7c217698e3001b60b313.tar.gz
bcm5719-llvm-f0b36a3cfd1ae7f5e85f7c217698e3001b60b313.zip
The tLDR instruction wasn't encoded properly:
<MCInst 2251 <MCOperand Reg:70> <MCOperand Reg:66> <MCOperand Imm:0> <MCOperand Reg:0> <MCOperand Imm:14> <MCOperand Reg:0>> Notice that the "reg" here is 0, which is an invalid register. Put a check in the code for this to prevent crashing. llvm-svn: 120766
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/ARM/ARMMCCodeEmitter.cpp8
1 files changed, 6 insertions, 2 deletions
diff --git a/llvm/lib/Target/ARM/ARMMCCodeEmitter.cpp b/llvm/lib/Target/ARM/ARMMCCodeEmitter.cpp
index 4b059197ff0..d6926d9450e 100644
--- a/llvm/lib/Target/ARM/ARMMCCodeEmitter.cpp
+++ b/llvm/lib/Target/ARM/ARMMCCodeEmitter.cpp
@@ -642,8 +642,12 @@ static unsigned getAddrModeSOpValue(const MCInst &MI, unsigned OpIdx,
const MCOperand &MO2 = MI.getOperand(OpIdx + 2);
unsigned Rn = getARMRegisterNumbering(MO.getReg());
unsigned Imm5 = (MO1.getImm() / Scale) & 0x1f;
- unsigned Rm = getARMRegisterNumbering(MO2.getReg());
- return (Rm << 3) | (Imm5 << 3) | Rn;
+
+ if (MO2.getReg() != 0)
+ // Is an immediate.
+ Imm5 = getARMRegisterNumbering(MO2.getReg());
+
+ return (Imm5 << 3) | Rn;
}
/// getAddrModeS4OpValue - Return encoding for t_addrmode_s4 operands.
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