summaryrefslogtreecommitdiffstats
path: root/llvm/lib
diff options
context:
space:
mode:
authorAlex Lorenz <arphaman@gmail.com>2015-08-19 18:55:47 +0000
committerAlex Lorenz <arphaman@gmail.com>2015-08-19 18:55:47 +0000
commite66a7ccf776b8d22819c4baa518a1d5825811c96 (patch)
tree99a6cfd9633af83e1982cd7e97439992edf381d4 /llvm/lib
parent27fd06922b161a5559fb3ac6ef8e5b85efc9da04 (diff)
downloadbcm5719-llvm-e66a7ccf776b8d22819c4baa518a1d5825811c96.tar.gz
bcm5719-llvm-e66a7ccf776b8d22819c4baa518a1d5825811c96.zip
MIR Serialization: Serialize defined registers that require 'def' register flag.
The defined registers are already serialized - they are represented by placing them before the '=' in a machine instruction. However, certain instructions like INLINEASM can have defined register operands after the '=', so this commit introduces the 'def' register flag for such operands. llvm-svn: 245480
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/CodeGen/MIRParser/MILexer.cpp1
-rw-r--r--llvm/lib/CodeGen/MIRParser/MILexer.h7
-rw-r--r--llvm/lib/CodeGen/MIRParser/MIParser.cpp4
-rw-r--r--llvm/lib/CodeGen/MIRPrinter.cpp11
4 files changed, 17 insertions, 6 deletions
diff --git a/llvm/lib/CodeGen/MIRParser/MILexer.cpp b/llvm/lib/CodeGen/MIRParser/MILexer.cpp
index 68c5e8af1a6..034a7d6e980 100644
--- a/llvm/lib/CodeGen/MIRParser/MILexer.cpp
+++ b/llvm/lib/CodeGen/MIRParser/MILexer.cpp
@@ -188,6 +188,7 @@ static MIToken::TokenKind getIdentifierKind(StringRef Identifier) {
.Case("_", MIToken::underscore)
.Case("implicit", MIToken::kw_implicit)
.Case("implicit-def", MIToken::kw_implicit_define)
+ .Case("def", MIToken::kw_def)
.Case("dead", MIToken::kw_dead)
.Case("killed", MIToken::kw_killed)
.Case("undef", MIToken::kw_undef)
diff --git a/llvm/lib/CodeGen/MIRParser/MILexer.h b/llvm/lib/CodeGen/MIRParser/MILexer.h
index fe8fc091b44..f0702fa01af 100644
--- a/llvm/lib/CodeGen/MIRParser/MILexer.h
+++ b/llvm/lib/CodeGen/MIRParser/MILexer.h
@@ -49,6 +49,7 @@ struct MIToken {
// Keywords
kw_implicit,
kw_implicit_define,
+ kw_def,
kw_dead,
kw_killed,
kw_undef,
@@ -145,9 +146,9 @@ public:
bool isRegisterFlag() const {
return Kind == kw_implicit || Kind == kw_implicit_define ||
- Kind == kw_dead || Kind == kw_killed || Kind == kw_undef ||
- Kind == kw_internal || Kind == kw_early_clobber ||
- Kind == kw_debug_use;
+ Kind == kw_def || Kind == kw_dead || Kind == kw_killed ||
+ Kind == kw_undef || Kind == kw_internal ||
+ Kind == kw_early_clobber || Kind == kw_debug_use;
}
bool isMemoryOperandFlag() const {
diff --git a/llvm/lib/CodeGen/MIRParser/MIParser.cpp b/llvm/lib/CodeGen/MIRParser/MIParser.cpp
index edfca5f88a4..481bc1da981 100644
--- a/llvm/lib/CodeGen/MIRParser/MIParser.cpp
+++ b/llvm/lib/CodeGen/MIRParser/MIParser.cpp
@@ -816,6 +816,9 @@ bool MIParser::parseRegisterFlag(unsigned &Flags) {
case MIToken::kw_implicit_define:
Flags |= RegState::ImplicitDefine;
break;
+ case MIToken::kw_def:
+ Flags |= RegState::Define;
+ break;
case MIToken::kw_dead:
Flags |= RegState::Dead;
break;
@@ -1297,6 +1300,7 @@ bool MIParser::parseMachineOperand(MachineOperand &Dest) {
switch (Token.kind()) {
case MIToken::kw_implicit:
case MIToken::kw_implicit_define:
+ case MIToken::kw_def:
case MIToken::kw_dead:
case MIToken::kw_killed:
case MIToken::kw_undef:
diff --git a/llvm/lib/CodeGen/MIRPrinter.cpp b/llvm/lib/CodeGen/MIRPrinter.cpp
index faeb9055c23..5d3c2999a11 100644
--- a/llvm/lib/CodeGen/MIRPrinter.cpp
+++ b/llvm/lib/CodeGen/MIRPrinter.cpp
@@ -116,7 +116,8 @@ public:
void printStackObjectReference(int FrameIndex);
void printOffset(int64_t Offset);
void printTargetFlags(const MachineOperand &Op);
- void print(const MachineOperand &Op, const TargetRegisterInfo *TRI);
+ void print(const MachineOperand &Op, const TargetRegisterInfo *TRI,
+ bool IsDef = false);
void print(const MachineMemOperand &Op);
void print(const MCCFIInstruction &CFI, const TargetRegisterInfo *TRI);
@@ -516,7 +517,7 @@ void MIPrinter::print(const MachineInstr &MI) {
++I) {
if (I)
OS << ", ";
- print(MI.getOperand(I), TRI);
+ print(MI.getOperand(I), TRI, /*IsDef=*/true);
}
if (I)
@@ -688,13 +689,17 @@ static const char *getTargetIndexName(const MachineFunction &MF, int Index) {
return nullptr;
}
-void MIPrinter::print(const MachineOperand &Op, const TargetRegisterInfo *TRI) {
+void MIPrinter::print(const MachineOperand &Op, const TargetRegisterInfo *TRI,
+ bool IsDef) {
printTargetFlags(Op);
switch (Op.getType()) {
case MachineOperand::MO_Register:
// FIXME: Serialize the tied register.
if (Op.isImplicit())
OS << (Op.isDef() ? "implicit-def " : "implicit ");
+ else if (!IsDef && Op.isDef())
+ // Print the 'def' flag only when the operand is defined after '='.
+ OS << "def ";
if (Op.isInternalRead())
OS << "internal ";
if (Op.isDead())
OpenPOWER on IntegriCloud