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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-12-27 15:46:10 -0500 |
|---|---|---|
| committer | Matt Arsenault <arsenm2@gmail.com> | 2019-12-27 16:53:29 -0500 |
| commit | e29ae3799ba33c5a6e8d49e6bf2ccdb9314ff6b5 (patch) | |
| tree | 2aa1faed351407ca781c2f7cfa59fbd02e7adc07 /llvm/lib | |
| parent | 9acd9544db9c3e5193389851915dbb69b5b685c2 (diff) | |
| download | bcm5719-llvm-e29ae3799ba33c5a6e8d49e6bf2ccdb9314ff6b5.tar.gz bcm5719-llvm-e29ae3799ba33c5a6e8d49e6bf2ccdb9314ff6b5.zip | |
TII: Fix using Register for a subregister index argument
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 2 | ||||
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIInstrInfo.h | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp index ed6532e951f..413f9561e76 100644 --- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp +++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp @@ -6573,7 +6573,7 @@ MachineInstr *SIInstrInfo::createPHIDestinationCopy( MachineInstr *SIInstrInfo::createPHISourceCopy( MachineBasicBlock &MBB, MachineBasicBlock::iterator InsPt, - const DebugLoc &DL, Register Src, Register SrcSubReg, Register Dst) const { + const DebugLoc &DL, Register Src, unsigned SrcSubReg, Register Dst) const { if (InsPt != MBB.end() && (InsPt->getOpcode() == AMDGPU::SI_IF || InsPt->getOpcode() == AMDGPU::SI_ELSE || diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.h b/llvm/lib/Target/AMDGPU/SIInstrInfo.h index 492bf4e4e92..0d02fe8cc65 100644 --- a/llvm/lib/Target/AMDGPU/SIInstrInfo.h +++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.h @@ -977,7 +977,7 @@ public: MachineInstr *createPHISourceCopy(MachineBasicBlock &MBB, MachineBasicBlock::iterator InsPt, const DebugLoc &DL, Register Src, - Register SrcSubReg, + unsigned SrcSubReg, Register Dst) const override; bool isWave32() const; |
