diff options
| author | Jeroen Ketema <j.ketema@imperial.ac.uk> | 2015-10-07 14:53:29 +0000 |
|---|---|---|
| committer | Jeroen Ketema <j.ketema@imperial.ac.uk> | 2015-10-07 14:53:29 +0000 |
| commit | aebca09543c04a5d7658878890c850682a926a5c (patch) | |
| tree | 3d8d703f756e25e00df3a1220f27d7b8572d51c5 /llvm/lib | |
| parent | 11db2d3dddd704601893adc8a6517a8f9040a384 (diff) | |
| download | bcm5719-llvm-aebca09543c04a5d7658878890c850682a926a5c.tar.gz bcm5719-llvm-aebca09543c04a5d7658878890c850682a926a5c.zip | |
[ARM][AArch64] Only lower to interleaved load/store if the target has NEON
Without an additional check for NEON, the compiler crashes during
legalization of NEON ldN/stN.
Differential Revision: http://reviews.llvm.org/D13508
llvm-svn: 249550
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 8 | ||||
| -rw-r--r-- | llvm/lib/Target/ARM/ARMISelLowering.cpp | 13 |
2 files changed, 11 insertions, 10 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp index def47393a47..b4a7352a046 100644 --- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp +++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp @@ -6987,8 +6987,8 @@ bool AArch64TargetLowering::lowerInterleavedLoad( VectorType *VecTy = Shuffles[0]->getType(); unsigned VecSize = DL.getTypeAllocSizeInBits(VecTy); - // Skip illegal vector types. - if (VecSize != 64 && VecSize != 128) + // Skip if we do not have NEON and skip illegal vector types. + if (!Subtarget->hasNEON() || (VecSize != 64 && VecSize != 128)) return false; // A pointer vector can not be the return type of the ldN intrinsics. Need to @@ -7073,8 +7073,8 @@ bool AArch64TargetLowering::lowerInterleavedStore(StoreInst *SI, const DataLayout &DL = SI->getModule()->getDataLayout(); unsigned SubVecSize = DL.getTypeAllocSizeInBits(SubVecTy); - // Skip illegal vector types. - if (SubVecSize != 64 && SubVecSize != 128) + // Skip if we do not have NEON and skip illegal vector types. + if (!Subtarget->hasNEON() || (SubVecSize != 64 && SubVecSize != 128)) return false; Value *Op0 = SVI->getOperand(0); diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp index a0b482080c8..6f886220bd2 100644 --- a/llvm/lib/Target/ARM/ARMISelLowering.cpp +++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp @@ -11825,9 +11825,9 @@ bool ARMTargetLowering::lowerInterleavedLoad( unsigned VecSize = DL.getTypeAllocSizeInBits(VecTy); bool EltIs64Bits = DL.getTypeAllocSizeInBits(EltTy) == 64; - // Skip illegal vector types and vector types of i64/f64 element (vldN doesn't - // support i64/f64 element). - if ((VecSize != 64 && VecSize != 128) || EltIs64Bits) + // Skip if we do not have NEON and skip illegal vector types and vector types + // with i64/f64 elements (vldN doesn't support i64/f64 elements). + if (!Subtarget->hasNEON() || (VecSize != 64 && VecSize != 128) || EltIs64Bits) return false; // A pointer vector can not be the return type of the ldN intrinsics. Need to @@ -11915,9 +11915,10 @@ bool ARMTargetLowering::lowerInterleavedStore(StoreInst *SI, unsigned SubVecSize = DL.getTypeAllocSizeInBits(SubVecTy); bool EltIs64Bits = DL.getTypeAllocSizeInBits(EltTy) == 64; - // Skip illegal sub vector types and vector types of i64/f64 element (vstN - // doesn't support i64/f64 element). - if ((SubVecSize != 64 && SubVecSize != 128) || EltIs64Bits) + // Skip if we do not have NEON and skip illegal vector types and vector types + // with i64/f64 elements (vstN doesn't support i64/f64 elements). + if (!Subtarget->hasNEON() || (SubVecSize != 64 && SubVecSize != 128) || + EltIs64Bits) return false; Value *Op0 = SVI->getOperand(0); |
