diff options
| author | Tim Northover <tnorthover@apple.com> | 2016-08-23 21:01:26 +0000 |
|---|---|---|
| committer | Tim Northover <tnorthover@apple.com> | 2016-08-23 21:01:26 +0000 |
| commit | 6cd4b23a0fc9cc2f24d996148e170b0a538079d7 (patch) | |
| tree | f70e16cf6123f81966b6be1c3a163a3b6a98cb11 /llvm/lib | |
| parent | b3a0be4d38ab08456aa4406e86d1b6c76581245a (diff) | |
| download | bcm5719-llvm-6cd4b23a0fc9cc2f24d996148e170b0a538079d7.tar.gz bcm5719-llvm-6cd4b23a0fc9cc2f24d996148e170b0a538079d7.zip | |
GlobalISel: legalize integer comparisons on AArch64.
Next step is doing both legalizations at the same time! Marvel at GlobalISel's
cunning.
llvm-svn: 279566
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp | 10 | ||||
| -rw-r--r-- | llvm/lib/CodeGen/GlobalISel/MachineLegalizeHelper.cpp | 36 | ||||
| -rw-r--r-- | llvm/lib/CodeGen/MIRParser/MIParser.cpp | 2 | ||||
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64MachineLegalizer.cpp | 13 |
4 files changed, 58 insertions, 3 deletions
diff --git a/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp b/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp index 5ad75889723..92323895562 100644 --- a/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp +++ b/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp @@ -146,6 +146,16 @@ MachineInstrBuilder MachineIRBuilder::buildAnyExtend(LLT Ty, unsigned Res, return buildInstr(TargetOpcode::G_ANYEXTEND, Ty).addDef(Res).addUse(Op); } +MachineInstrBuilder MachineIRBuilder::buildSExt(ArrayRef<LLT> Tys, unsigned Res, + unsigned Op) { + return buildInstr(TargetOpcode::G_SEXT, Tys).addDef(Res).addUse(Op); +} + +MachineInstrBuilder MachineIRBuilder::buildZExt(ArrayRef<LLT> Tys, unsigned Res, + unsigned Op) { + return buildInstr(TargetOpcode::G_ZEXT, Tys).addDef(Res).addUse(Op); +} + MachineInstrBuilder MachineIRBuilder::buildExtract(ArrayRef<LLT> ResTys, ArrayRef<unsigned> Results, ArrayRef<uint64_t> Indices, diff --git a/llvm/lib/CodeGen/GlobalISel/MachineLegalizeHelper.cpp b/llvm/lib/CodeGen/GlobalISel/MachineLegalizeHelper.cpp index f22cf358e77..2fb7f244c25 100644 --- a/llvm/lib/CodeGen/GlobalISel/MachineLegalizeHelper.cpp +++ b/llvm/lib/CodeGen/GlobalISel/MachineLegalizeHelper.cpp @@ -107,8 +107,6 @@ MachineLegalizeHelper::narrowScalar(MachineInstr &MI, unsigned TypeIdx, MachineLegalizeHelper::LegalizeResult MachineLegalizeHelper::widenScalar(MachineInstr &MI, unsigned TypeIdx, LLT WideTy) { - assert(TypeIdx == 0 && "don't know how to handle secondary types yet"); - unsigned WideSize = WideTy.getSizeInBits(); MIRBuilder.setInstr(MI); @@ -180,6 +178,40 @@ MachineLegalizeHelper::widenScalar(MachineInstr &MI, unsigned TypeIdx, MI.eraseFromParent(); return Legalized; } + case TargetOpcode::G_ICMP: { + if (TypeIdx == 0) { + unsigned TstExt = MRI.createGenericVirtualRegister(WideSize); + MIRBuilder.buildICmp( + {WideTy, MI.getType(1)}, + static_cast<CmpInst::Predicate>(MI.getOperand(1).getPredicate()), + TstExt, MI.getOperand(2).getReg(), MI.getOperand(3).getReg()); + MIRBuilder.buildTrunc(MI.getType(), MI.getOperand(0).getReg(), TstExt); + MI.eraseFromParent(); + return Legalized; + } else { + bool IsSigned = CmpInst::isSigned( + static_cast<CmpInst::Predicate>(MI.getOperand(1).getPredicate())); + unsigned Op0Ext = MRI.createGenericVirtualRegister(WideSize); + unsigned Op1Ext = MRI.createGenericVirtualRegister(WideSize); + if (IsSigned) { + MIRBuilder.buildSExt({WideTy, MI.getType(1)}, Op0Ext, + MI.getOperand(2).getReg()); + MIRBuilder.buildSExt({WideTy, MI.getType(1)}, Op1Ext, + MI.getOperand(3).getReg()); + } else { + MIRBuilder.buildZExt({WideTy, MI.getType(1)}, Op0Ext, + MI.getOperand(2).getReg()); + MIRBuilder.buildZExt({WideTy, MI.getType(1)}, Op1Ext, + MI.getOperand(3).getReg()); + } + MIRBuilder.buildICmp( + {MI.getType(0), WideTy}, + static_cast<CmpInst::Predicate>(MI.getOperand(1).getPredicate()), + MI.getOperand(0).getReg(), Op0Ext, Op1Ext); + MI.eraseFromParent(); + return Legalized; + } + } } } diff --git a/llvm/lib/CodeGen/MIRParser/MIParser.cpp b/llvm/lib/CodeGen/MIRParser/MIParser.cpp index 0602256683f..858c8ebc8e1 100644 --- a/llvm/lib/CodeGen/MIRParser/MIParser.cpp +++ b/llvm/lib/CodeGen/MIRParser/MIParser.cpp @@ -1522,7 +1522,7 @@ bool MIParser::parsePredicateOperand(MachineOperand &Dest) { lex(); Dest = MachineOperand::CreatePredicate(Pred); - if (!expectAndConsume(MIToken::rparen)) + if (expectAndConsume(MIToken::rparen)) return error("predicate should be terminated by ')'."); return false; diff --git a/llvm/lib/Target/AArch64/AArch64MachineLegalizer.cpp b/llvm/lib/Target/AArch64/AArch64MachineLegalizer.cpp index 9d9f0b38b18..038c3ccf45a 100644 --- a/llvm/lib/Target/AArch64/AArch64MachineLegalizer.cpp +++ b/llvm/lib/Target/AArch64/AArch64MachineLegalizer.cpp @@ -73,6 +73,19 @@ AArch64MachineLegalizer::AArch64MachineLegalizer() { setAction({TargetOpcode::G_FCONSTANT, s16}, WidenScalar); + // Comparisons: we produce a result in s32 with undefined high-bits for + // now. Values being compared can be 32 or 64-bits. + for (auto CmpOp : { G_ICMP }) { + setAction({CmpOp, 0, s32}, Legal); + setAction({CmpOp, 1, s32}, Legal); + setAction({CmpOp, 1, s64}, Legal); + + for (auto Ty : {s1, s8, s16}) { + setAction({CmpOp, 0, Ty}, WidenScalar); + setAction({CmpOp, 1, Ty}, WidenScalar); + } + } + // Control-flow setAction({G_BR, LLT::unsized()}, Legal); setAction({G_BRCOND, s32}, Legal); |

