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| author | Bob Wilson <bob.wilson@apple.com> | 2010-06-02 18:54:47 +0000 |
|---|---|---|
| committer | Bob Wilson <bob.wilson@apple.com> | 2010-06-02 18:54:47 +0000 |
| commit | 2d35a9e810cb21451c10c506f2c6ddb2ad6cf0fc (patch) | |
| tree | e9bfdff1df6ce8804bf981aa1f6678a26d09f767 /llvm/lib | |
| parent | 8ae5097f8106b260389a269370f240d1ada84a30 (diff) | |
| download | bcm5719-llvm-2d35a9e810cb21451c10c506f2c6ddb2ad6cf0fc.tar.gz bcm5719-llvm-2d35a9e810cb21451c10c506f2c6ddb2ad6cf0fc.zip | |
Rename canCombinedSubRegIndex method to something more grammatically correct
and tidy up the comment describing it.
llvm-svn: 105339
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/CodeGen/TwoAddressInstructionPass.cpp | 4 | ||||
| -rw-r--r-- | llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp | 2 | ||||
| -rw-r--r-- | llvm/lib/Target/ARM/ARMBaseRegisterInfo.h | 17 |
3 files changed, 12 insertions, 11 deletions
diff --git a/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp b/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp index f61dbc95d1a..cd475cc0a9b 100644 --- a/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp +++ b/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp @@ -1185,8 +1185,8 @@ TwoAddressInstructionPass::CoalesceExtSubRegs(SmallVector<unsigned,4> &Srcs, std::sort(SubIndices.begin(), SubIndices.end()); unsigned NewSubIdx = 0; - if (TRI->canCombinedSubRegIndex(MRI->getRegClass(SrcReg), SubIndices, - NewSubIdx)) { + if (TRI->canCombineSubRegIndices(MRI->getRegClass(SrcReg), SubIndices, + NewSubIdx)) { bool Proceed = true; if (NewSubIdx) for (MachineRegisterInfo::reg_iterator RI = MRI->reg_begin(SrcReg), diff --git a/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp b/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp index 3636892c3ae..bec7eee4cb4 100644 --- a/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp +++ b/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp @@ -302,7 +302,7 @@ ARMBaseRegisterInfo::getMatchingSuperRegClass(const TargetRegisterClass *A, } bool -ARMBaseRegisterInfo::canCombinedSubRegIndex(const TargetRegisterClass *RC, +ARMBaseRegisterInfo::canCombineSubRegIndices(const TargetRegisterClass *RC, SmallVectorImpl<unsigned> &SubIndices, unsigned &NewSubIdx) const { diff --git a/llvm/lib/Target/ARM/ARMBaseRegisterInfo.h b/llvm/lib/Target/ARM/ARMBaseRegisterInfo.h index 978fe4348ae..c0d4e0f224d 100644 --- a/llvm/lib/Target/ARM/ARMBaseRegisterInfo.h +++ b/llvm/lib/Target/ARM/ARMBaseRegisterInfo.h @@ -78,14 +78,15 @@ public: getMatchingSuperRegClass(const TargetRegisterClass *A, const TargetRegisterClass *B, unsigned Idx) const; - /// canCombinedSubRegIndex - Given a register class and a list of sub-register - /// indices, return true if it's possible to combine the sub-register indices - /// into one that corresponds to a larger sub-register. Return the new sub- - /// register index by reference. Note the new index by be zero if the given - /// sub-registers combined to form the whole register. - virtual bool canCombinedSubRegIndex(const TargetRegisterClass *RC, - SmallVectorImpl<unsigned> &SubIndices, - unsigned &NewSubIdx) const; + /// canCombineSubRegIndices - Given a register class and a list of + /// subregister indices, return true if it's possible to combine the + /// subregister indices into one that corresponds to a larger + /// subregister. Return the new subregister index by reference. Note the + /// new index may be zero if the given subregisters can be combined to + /// form the whole register. + virtual bool canCombineSubRegIndices(const TargetRegisterClass *RC, + SmallVectorImpl<unsigned> &SubIndices, + unsigned &NewSubIdx) const; const TargetRegisterClass *getPointerRegClass(unsigned Kind = 0) const; |

