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| author | Craig Topper <craig.topper@gmail.com> | 2019-12-29 16:41:28 -0800 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2019-12-29 17:35:49 -0800 |
| commit | 266cd7717c8126213a7560d26da5495053be90c0 (patch) | |
| tree | cb7702179d54e89a45090db6c7b818f2d2654d20 /llvm/lib | |
| parent | b2f19320dc1ca82acd3939b18c5c73ee8833b735 (diff) | |
| download | bcm5719-llvm-266cd7717c8126213a7560d26da5495053be90c0.tar.gz bcm5719-llvm-266cd7717c8126213a7560d26da5495053be90c0.zip | |
[X86] Use APInt::isOneValue and ConstantSDNode::isOne. NFC
These are implemented slightly more efficiently than comparing
to 1 in the case that the value is more than 64 bits.
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index ff15c2b396b..65a7bb14765 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -4834,7 +4834,7 @@ static X86::CondCode TranslateX86CC(ISD::CondCode SetCCOpcode, const SDLoc &DL, // X >= 0 -> X == 0, jump on !sign. return X86::COND_NS; } - if (SetCCOpcode == ISD::SETLT && RHSC->getAPIntValue() == 1) { + if (SetCCOpcode == ISD::SETLT && RHSC->isOne()) { // X < 1 -> X <= 0 RHS = DAG.getConstant(0, DL, RHS.getValueType()); return X86::COND_LE; @@ -39086,7 +39086,7 @@ static SDValue combineShiftLeft(SDNode *N, SelectionDAG &DAG) { // We shift all of the values by one. In many cases we do not have // hardware support for this operation. This is better expressed as an ADD // of two values. - if (N1SplatC->getAPIntValue() == 1) + if (N1SplatC->isOne()) return DAG.getNode(ISD::ADD, SDLoc(N), VT, N0, N0); } @@ -40493,7 +40493,7 @@ static SDValue combineOrShiftToFunnelShift(SDNode *N, SelectionDAG &DAG, (ShAmt1Op0 == ShAmt0 || ShAmt1Op0 == ShMsk0)) { if (Op1.getOpcode() == InnerShift && isa<ConstantSDNode>(Op1.getOperand(1)) && - Op1.getConstantOperandAPInt(1) == 1) { + Op1.getConstantOperandAPInt(1).isOneValue()) { return GetFunnelShift(Op0, Op1.getOperand(0), ShAmt0); } // Test for ADD( Y, Y ) as an equivalent to SHL( Y, 1 ). @@ -42496,7 +42496,7 @@ static SDValue foldXor1SetCC(SDNode *N, SelectionDAG &DAG) { return SDValue(); SDValue LHS = N->getOperand(0); - if (!OneConstant(N->getOperand(1)) || LHS->getOpcode() != X86ISD::SETCC) + if (!isOneConstant(N->getOperand(1)) || LHS->getOpcode() != X86ISD::SETCC) return SDValue(); X86::CondCode NewCC = X86::GetOppositeBranchCondition( |

