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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-07-20 06:31:06 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-07-20 06:31:06 +0000 |
| commit | 0163e033e250654d177470822c43fc9e8eefe56f (patch) | |
| tree | 04ea132daee861c264be99bead0d5ed2b65a1ef8 /llvm/lib | |
| parent | e261b6e853c3591e61a9cfdb420e6a8900d14f0d (diff) | |
| download | bcm5719-llvm-0163e033e250654d177470822c43fc9e8eefe56f.tar.gz bcm5719-llvm-0163e033e250654d177470822c43fc9e8eefe56f.zip | |
R600: Remove unused function
llvm-svn: 213472
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/R600/AMDGPUInstrInfo.h | 1 | ||||
| -rw-r--r-- | llvm/lib/Target/R600/R600InstrInfo.cpp | 6 | ||||
| -rw-r--r-- | llvm/lib/Target/R600/R600InstrInfo.h | 1 | ||||
| -rw-r--r-- | llvm/lib/Target/R600/SIInstrInfo.h | 4 |
4 files changed, 1 insertions, 11 deletions
diff --git a/llvm/lib/Target/R600/AMDGPUInstrInfo.h b/llvm/lib/Target/R600/AMDGPUInstrInfo.h index 95dc8c14c29..d5041f55816 100644 --- a/llvm/lib/Target/R600/AMDGPUInstrInfo.h +++ b/llvm/lib/Target/R600/AMDGPUInstrInfo.h @@ -144,7 +144,6 @@ public: // Pure virtual funtions to be implemented by sub-classes. //===---------------------------------------------------------------------===// - virtual unsigned getIEQOpcode() const = 0; virtual bool isMov(unsigned opcode) const = 0; /// \brief Calculate the "Indirect Address" for the given \p RegIndex and diff --git a/llvm/lib/Target/R600/R600InstrInfo.cpp b/llvm/lib/Target/R600/R600InstrInfo.cpp index 65dce6e5a7d..99920b7761a 100644 --- a/llvm/lib/Target/R600/R600InstrInfo.cpp +++ b/llvm/lib/Target/R600/R600InstrInfo.cpp @@ -92,10 +92,6 @@ bool R600InstrInfo::isLegalToSplitMBBAt(MachineBasicBlock &MBB, return true; } -unsigned R600InstrInfo::getIEQOpcode() const { - return AMDGPU::SETE_INT; -} - bool R600InstrInfo::isMov(unsigned Opcode) const { @@ -323,7 +319,7 @@ R600InstrInfo::getSrcs(MachineInstr *MI) const { Result.push_back(std::pair<MachineOperand *, int64_t>(&MO, Sel)); continue; } - + } return Result; } diff --git a/llvm/lib/Target/R600/R600InstrInfo.h b/llvm/lib/Target/R600/R600InstrInfo.h index 45a57d367b8..1c3cb637a17 100644 --- a/llvm/lib/Target/R600/R600InstrInfo.h +++ b/llvm/lib/Target/R600/R600InstrInfo.h @@ -152,7 +152,6 @@ namespace llvm { /// instruction slots within an instruction group. bool isVector(const MachineInstr &MI) const; - unsigned getIEQOpcode() const override; bool isMov(unsigned Opcode) const override; DFAPacketizer *CreateTargetScheduleState(const TargetMachine *TM, diff --git a/llvm/lib/Target/R600/SIInstrInfo.h b/llvm/lib/Target/R600/SIInstrInfo.h index 4c204d87780..cae6ffff5c4 100644 --- a/llvm/lib/Target/R600/SIInstrInfo.h +++ b/llvm/lib/Target/R600/SIInstrInfo.h @@ -89,10 +89,6 @@ public: bool isTriviallyReMaterializable(const MachineInstr *MI, AliasAnalysis *AA = nullptr) const; - unsigned getIEQOpcode() const override { - llvm_unreachable("Unimplemented"); - } - MachineInstr *buildMovInstr(MachineBasicBlock *MBB, MachineBasicBlock::iterator I, unsigned DstReg, unsigned SrcReg) const override; |

