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| author | Daniel Sanders <daniel_l_sanders@apple.com> | 2017-08-11 19:19:21 +0000 |
|---|---|---|
| committer | Daniel Sanders <daniel_l_sanders@apple.com> | 2017-08-11 19:19:21 +0000 |
| commit | e6c216ed5b58a180c2daffb1ceec4519c48138c3 (patch) | |
| tree | 5ea74e7dde6e3109f13d117293582672af032e18 /llvm/lib/Target | |
| parent | 460ed0a0c59e30f88b1aae1a8526020a45f74758 (diff) | |
| download | bcm5719-llvm-e6c216ed5b58a180c2daffb1ceec4519c48138c3.tar.gz bcm5719-llvm-e6c216ed5b58a180c2daffb1ceec4519c48138c3.zip | |
Revert r310716 (and r310735): [globalisel][tablegen] Support zero-instruction emission.
Two of the Windows bots are failing test\CodeGen\X86\GlobalISel\select-inc.mir
which should not have been affected by the change. Reverting while I investigate.
Also reverted r310735 because it builds on r310716.
llvm-svn: 310745
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp | 12 |
1 files changed, 1 insertions, 11 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp b/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp index 22586a1708e..1b45f87bc72 100644 --- a/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp +++ b/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp @@ -1163,18 +1163,8 @@ bool AArch64InstructionSelector::select(MachineInstr &I) const { case TargetOpcode::G_INTTOPTR: - // The importer is currently unable to import pointer types since they - // didn't exist in SelectionDAG. - return selectCopy(I, TII, MRI, TRI, RBI); - case TargetOpcode::G_BITCAST: - // Imported SelectionDAG rules can handle every bitcast except those that - // bitcast from a type to the same type. Ideally, these shouldn't occur - // but we might not run an optimizer that deletes them. - if (MRI.getType(I.getOperand(0).getReg()) == - MRI.getType(I.getOperand(1).getReg())) - return selectCopy(I, TII, MRI, TRI, RBI); - return false; + return selectCopy(I, TII, MRI, TRI, RBI); case TargetOpcode::G_FPEXT: { if (MRI.getType(I.getOperand(0).getReg()) != LLT::scalar(64)) { |

