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authorCraig Topper <craig.topper@intel.com>2019-10-11 04:16:49 +0000
committerCraig Topper <craig.topper@intel.com>2019-10-11 04:16:49 +0000
commitccc85ac85569c55b6915180d8b722812b4a226b6 (patch)
tree69a963a8a2970d0b9a7ca4858329a8120b5fe54f /llvm/lib/Target
parent4b9947e2e76e1e7b1ec0b2fdb9609b2850a20812 (diff)
downloadbcm5719-llvm-ccc85ac85569c55b6915180d8b722812b4a226b6.tar.gz
bcm5719-llvm-ccc85ac85569c55b6915180d8b722812b4a226b6.zip
[X86] Add a DAG combine to turn v16i16->v16i8 VTRUNCUS+store into a saturating truncating store.
llvm-svn: 374509
Diffstat (limited to 'llvm/lib/Target')
-rw-r--r--llvm/lib/Target/X86/X86ISelLowering.cpp13
1 files changed, 13 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 275e876644c..0e119415303 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -40448,6 +40448,19 @@ static SDValue combineStore(SDNode *N, SelectionDAG &DAG,
MVT::v16i8, St->getMemOperand());
}
+ // Try to fold a vpmovuswb 256->128 into a truncating store.
+ // FIXME: Generalize this to other types.
+ // FIXME: Do the same for signed saturation.
+ if (!St->isTruncatingStore() && VT == MVT::v16i8 &&
+ St->getValue().getOpcode() == X86ISD::VTRUNCUS &&
+ St->getValue().getOperand(0).getValueType() == MVT::v16i16 &&
+ TLI.isTruncStoreLegal(MVT::v16i16, MVT::v16i8) &&
+ St->getValue().hasOneUse()) {
+ return EmitTruncSStore(false /* Unsigned saturation */, St->getChain(),
+ dl, St->getValue().getOperand(0), St->getBasePtr(),
+ MVT::v16i8, St->getMemOperand(), DAG);
+ }
+
// Optimize trunc store (of multiple scalars) to shuffle and store.
// First, pack all of the elements in one place. Next, store to memory
// in fewer chunks.
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