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| author | Evandro Menezes <e.menezes@samsung.com> | 2018-09-19 19:43:23 +0000 |
|---|---|---|
| committer | Evandro Menezes <e.menezes@samsung.com> | 2018-09-19 19:43:23 +0000 |
| commit | c62ab611732099180ae3e5d3774ed43747b40051 (patch) | |
| tree | 6e0294d84f363e33d27a86961289f98f07bf82f3 /llvm/lib/Target | |
| parent | e62fc3d0b6ce923dcbc29eeb6ebc5808e6724f90 (diff) | |
| download | bcm5719-llvm-c62ab611732099180ae3e5d3774ed43747b40051.tar.gz bcm5719-llvm-c62ab611732099180ae3e5d3774ed43747b40051.zip | |
[ARM] Refactor Exynos feature set (NFC)
Since all Exynos processors share the same feature set, fold them in the
implied fatures list for the subtarget.
llvm-svn: 342583
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/ARM/ARM.td | 90 | ||||
| -rw-r--r-- | llvm/lib/Target/ARM/ARMSubtarget.cpp | 2 | ||||
| -rw-r--r-- | llvm/lib/Target/ARM/ARMSubtarget.h | 2 |
3 files changed, 23 insertions, 71 deletions
diff --git a/llvm/lib/Target/ARM/ARM.td b/llvm/lib/Target/ARM/ARM.td index 2d0f27031af..c42a4ebf273 100644 --- a/llvm/lib/Target/ARM/ARM.td +++ b/llvm/lib/Target/ARM/ARM.td @@ -494,8 +494,23 @@ def ProcKryo : SubtargetFeature<"kryo", "ARMProcFamily", "Kryo", def ProcSwift : SubtargetFeature<"swift", "ARMProcFamily", "Swift", "Swift ARM processors", []>; -def ProcExynosM1 : SubtargetFeature<"exynosm1", "ARMProcFamily", "ExynosM1", - "Samsung Exynos-Mx processors", []>; +def ProcExynos : SubtargetFeature<"exynos", "ARMProcFamily", "Exynos", + "Samsung Exynos processors", + [FeatureZCZeroing, + FeatureUseWideStrideVFP, + FeatureUseAA, + FeatureSplatVFPToNeon, + FeatureSlowVGETLNi32, + FeatureSlowVDUP32, + FeatureSlowFPBrcc, + FeatureProfUnpredicate, + FeatureHWDivThumb, + FeatureHWDivARM, + FeatureHasSlowFPVMLx, + FeatureHasRetAddrStack, + FeatureExpandMLx, + FeatureCrypto, + FeatureCRC]>; def ProcR4 : SubtargetFeature<"r4", "ARMProcFamily", "CortexR4", "Cortex-R4 ARM processors", []>; @@ -1033,73 +1048,10 @@ def : ProcessorModel<"cyclone", SwiftModel, [ARMv8a, ProcSwift, FeatureZCZeroing, FeatureNoPostRASched]>; -def : ProcNoItin<"exynos-m1", [ARMv8a, ProcExynosM1, - FeatureZCZeroing, - FeatureUseWideStrideVFP, - FeatureUseAA, - FeatureSplatVFPToNeon, - FeatureSlowVGETLNi32, - FeatureSlowVDUP32, - FeatureSlowFPBrcc, - FeatureProfUnpredicate, - FeatureHWDivThumb, - FeatureHWDivARM, - FeatureHasSlowFPVMLx, - FeatureHasRetAddrStack, - FeatureExpandMLx, - FeatureCrypto, - FeatureCRC]>; - -def : ProcNoItin<"exynos-m2", [ARMv8a, ProcExynosM1, - FeatureZCZeroing, - FeatureUseWideStrideVFP, - FeatureUseAA, - FeatureSplatVFPToNeon, - FeatureSlowVGETLNi32, - FeatureSlowVDUP32, - FeatureSlowFPBrcc, - FeatureProfUnpredicate, - FeatureHWDivThumb, - FeatureHWDivARM, - FeatureHasSlowFPVMLx, - FeatureHasRetAddrStack, - FeatureExpandMLx, - FeatureCrypto, - FeatureCRC]>; - -def : ProcNoItin<"exynos-m3", [ARMv8a, ProcExynosM1, - FeatureZCZeroing, - FeatureUseWideStrideVFP, - FeatureUseAA, - FeatureSplatVFPToNeon, - FeatureSlowVGETLNi32, - FeatureSlowVDUP32, - FeatureSlowFPBrcc, - FeatureProfUnpredicate, - FeatureHWDivThumb, - FeatureHWDivARM, - FeatureHasSlowFPVMLx, - FeatureHasRetAddrStack, - FeatureExpandMLx, - FeatureCrypto, - FeatureCRC]>; - -def : ProcNoItin<"exynos-m4", [ARMv8a, ProcExynosM1, - FeatureZCZeroing, - FeatureUseWideStrideVFP, - FeatureUseAA, - FeatureSplatVFPToNeon, - FeatureSlowVGETLNi32, - FeatureSlowVDUP32, - FeatureSlowFPBrcc, - FeatureProfUnpredicate, - FeatureHWDivThumb, - FeatureHWDivARM, - FeatureHasSlowFPVMLx, - FeatureHasRetAddrStack, - FeatureExpandMLx, - FeatureCrypto, - FeatureCRC]>; +def : ProcNoItin<"exynos-m1", [ARMv8a, ProcExynos]>; +def : ProcNoItin<"exynos-m2", [ARMv8a, ProcExynos]>; +def : ProcNoItin<"exynos-m3", [ARMv8a, ProcExynos]>; +def : ProcNoItin<"exynos-m4", [ARMv8a, ProcExynos]>; def : ProcNoItin<"kryo", [ARMv8a, ProcKryo, FeatureHWDivThumb, diff --git a/llvm/lib/Target/ARM/ARMSubtarget.cpp b/llvm/lib/Target/ARM/ARMSubtarget.cpp index 07dfce975c1..36701af3f40 100644 --- a/llvm/lib/Target/ARM/ARMSubtarget.cpp +++ b/llvm/lib/Target/ARM/ARMSubtarget.cpp @@ -287,7 +287,7 @@ void ARMSubtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) { case CortexR7: case CortexM3: case CortexR52: - case ExynosM1: + case Exynos: case Kryo: break; case Krait: diff --git a/llvm/lib/Target/ARM/ARMSubtarget.h b/llvm/lib/Target/ARM/ARMSubtarget.h index 34938c399fe..3ac25450379 100644 --- a/llvm/lib/Target/ARM/ARMSubtarget.h +++ b/llvm/lib/Target/ARM/ARMSubtarget.h @@ -68,7 +68,7 @@ protected: CortexR5, CortexR52, CortexR7, - ExynosM1, + Exynos, Krait, Kryo, Swift |
