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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2017-03-13 21:23:29 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2017-03-13 21:23:29 +0000 |
| commit | 9df7d08cb28487ab8e69e99507047d07726fcc8f (patch) | |
| tree | 1fbb7664104bf97289c566eb9a91514d9238201c /llvm/lib/Target | |
| parent | 0f1d32d5571fd485a144bde7831d8cc5497177b4 (diff) | |
| download | bcm5719-llvm-9df7d08cb28487ab8e69e99507047d07726fcc8f.tar.gz bcm5719-llvm-9df7d08cb28487ab8e69e99507047d07726fcc8f.zip | |
[X86][MMX] Fix folding of shift value loads to cover whole 64-bits
rL230225 made the assumption that only the lower 32-bits of an MMX register load is used as a shift value, when in fact the whole 64-bits are reloaded and treated as a i64 to determine the shift value.
This patch reverts rL230225 to ensure that the whole 64-bits of memory are folded and ensures that the upper 32-bit are zero'd for cases where the shift value has come from a scalar source.
Found during fuzz testing.
Differential Revision: https://reviews.llvm.org/D30833
llvm-svn: 297667
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrFragmentsSIMD.td | 2 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrMMX.td | 19 |
2 files changed, 0 insertions, 21 deletions
diff --git a/llvm/lib/Target/X86/X86InstrFragmentsSIMD.td b/llvm/lib/Target/X86/X86InstrFragmentsSIMD.td index 39befdfc810..f4146e450dd 100644 --- a/llvm/lib/Target/X86/X86InstrFragmentsSIMD.td +++ b/llvm/lib/Target/X86/X86InstrFragmentsSIMD.td @@ -27,8 +27,6 @@ def MMX_X86movw2d : SDNode<"X86ISD::MMX_MOVW2D", SDTypeProfile<1, 1, //===----------------------------------------------------------------------===// def load_mmx : PatFrag<(ops node:$ptr), (x86mmx (load node:$ptr))>; -def load_mvmmx : PatFrag<(ops node:$ptr), - (x86mmx (MMX_X86movw2d (load node:$ptr)))>; //===----------------------------------------------------------------------===// // SSE specific DAG Nodes. diff --git a/llvm/lib/Target/X86/X86InstrMMX.td b/llvm/lib/Target/X86/X86InstrMMX.td index 98b44d64c30..2fb208700e1 100644 --- a/llvm/lib/Target/X86/X86InstrMMX.td +++ b/llvm/lib/Target/X86/X86InstrMMX.td @@ -479,13 +479,6 @@ defm MMX_PSRLQ : MMXI_binop_rmi_int<0xD3, 0x73, MRM2r, "psrlq", int_x86_mmx_psrl_q, int_x86_mmx_psrli_q, MMX_SHIFT_ITINS>; -def : Pat<(int_x86_mmx_psrl_w VR64:$src1, (load_mvmmx addr:$src2)), - (MMX_PSRLWrm VR64:$src1, addr:$src2)>; -def : Pat<(int_x86_mmx_psrl_d VR64:$src1, (load_mvmmx addr:$src2)), - (MMX_PSRLDrm VR64:$src1, addr:$src2)>; -def : Pat<(int_x86_mmx_psrl_q VR64:$src1, (load_mvmmx addr:$src2)), - (MMX_PSRLQrm VR64:$src1, addr:$src2)>; - defm MMX_PSLLW : MMXI_binop_rmi_int<0xF1, 0x71, MRM6r, "psllw", int_x86_mmx_psll_w, int_x86_mmx_pslli_w, MMX_SHIFT_ITINS>; @@ -496,13 +489,6 @@ defm MMX_PSLLQ : MMXI_binop_rmi_int<0xF3, 0x73, MRM6r, "psllq", int_x86_mmx_psll_q, int_x86_mmx_pslli_q, MMX_SHIFT_ITINS>; -def : Pat<(int_x86_mmx_psll_w VR64:$src1, (load_mvmmx addr:$src2)), - (MMX_PSLLWrm VR64:$src1, addr:$src2)>; -def : Pat<(int_x86_mmx_psll_d VR64:$src1, (load_mvmmx addr:$src2)), - (MMX_PSLLDrm VR64:$src1, addr:$src2)>; -def : Pat<(int_x86_mmx_psll_q VR64:$src1, (load_mvmmx addr:$src2)), - (MMX_PSLLQrm VR64:$src1, addr:$src2)>; - defm MMX_PSRAW : MMXI_binop_rmi_int<0xE1, 0x71, MRM4r, "psraw", int_x86_mmx_psra_w, int_x86_mmx_psrai_w, MMX_SHIFT_ITINS>; @@ -510,11 +496,6 @@ defm MMX_PSRAD : MMXI_binop_rmi_int<0xE2, 0x72, MRM4r, "psrad", int_x86_mmx_psra_d, int_x86_mmx_psrai_d, MMX_SHIFT_ITINS>; -def : Pat<(int_x86_mmx_psra_w VR64:$src1, (load_mvmmx addr:$src2)), - (MMX_PSRAWrm VR64:$src1, addr:$src2)>; -def : Pat<(int_x86_mmx_psra_d VR64:$src1, (load_mvmmx addr:$src2)), - (MMX_PSRADrm VR64:$src1, addr:$src2)>; - // Comparison Instructions defm MMX_PCMPEQB : MMXI_binop_rm_int<0x74, "pcmpeqb", int_x86_mmx_pcmpeq_b, MMX_INTALU_ITINS>; |
