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| author | Jiangning Liu <jiangning.liu@arm.com> | 2013-11-28 01:34:55 +0000 |
|---|---|---|
| committer | Jiangning Liu <jiangning.liu@arm.com> | 2013-11-28 01:34:55 +0000 |
| commit | 4bc9dbd84685663ee0849fc22ff5c19839dee893 (patch) | |
| tree | 66bb911a6956ff4ba091d8ee16ae28dc716de51a /llvm/lib/Target | |
| parent | 49d922109888e5af125c0b0823ac2607decbe8d8 (diff) | |
| download | bcm5719-llvm-4bc9dbd84685663ee0849fc22ff5c19839dee893.tar.gz bcm5719-llvm-4bc9dbd84685663ee0849fc22ff5c19839dee893.zip | |
Remove the variable only used by assert to avoid the build failure
caused by build options [-Werror,-Wunused-variable].
llvm-svn: 195905
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp index 7311d554ee0..15232523fe4 100644 --- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp +++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp @@ -4241,8 +4241,8 @@ AArch64TargetLowering::LowerVECTOR_SHUFFLE(SDValue Op, // Test if V1 is a CONCAT_VECTORS. if (V1.getOpcode() == ISD::CONCAT_VECTORS) { if (V1.getOperand(1).getOpcode() == ISD::UNDEF) { - int V1EltNum = V1.getOperand(0).getValueType().getVectorNumElements(); - assert((Lane < V1EltNum) && "Invalid vector lane access"); + assert((Lane < V1.getOperand(0).getValueType().getVectorNumElements()) + && "Invalid vector lane access"); return DAG.getNode(AArch64ISD::NEON_VDUPLANE, dl, VT, V1.getOperand(0), DAG.getConstant(Lane, MVT::i64)); } |
