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| author | Diana Picus <diana.picus@linaro.org> | 2019-04-10 09:14:37 +0000 |
|---|---|---|
| committer | Diana Picus <diana.picus@linaro.org> | 2019-04-10 09:14:37 +0000 |
| commit | 4a7f8d8d6b18f8ceacc94eda602e750b9f65b2d4 (patch) | |
| tree | dd58e0dd90bfa84a8b4578b74a4b6d461649e01a /llvm/lib/Target | |
| parent | b6e83b98f94a0e2891475b28e507a4f62d8a3b4a (diff) | |
| download | bcm5719-llvm-4a7f8d8d6b18f8ceacc94eda602e750b9f65b2d4.tar.gz bcm5719-llvm-4a7f8d8d6b18f8ceacc94eda602e750b9f65b2d4.zip | |
[ARM GlobalISel] Add some asserts. NFC.
Make sure some arm opcodes don't unintentionally sneak into thumb mode.
llvm-svn: 358064
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMInstructionSelector.cpp | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstructionSelector.cpp b/llvm/lib/Target/ARM/ARMInstructionSelector.cpp index c7bead914b6..acb21995f95 100644 --- a/llvm/lib/Target/ARM/ARMInstructionSelector.cpp +++ b/llvm/lib/Target/ARM/ARMInstructionSelector.cpp @@ -801,6 +801,7 @@ bool ARMInstructionSelector::selectSelect(MachineInstrBuilder &MIB, bool ARMInstructionSelector::selectShift(unsigned ShiftOpc, MachineInstrBuilder &MIB) const { + assert(!STI.isThumb() && "Unsupported subtarget"); MIB->setDesc(TII.get(ARM::MOVsr)); MIB.addImm(ShiftOpc); MIB.add(predOps(ARMCC::AL)).add(condCodeOp()); @@ -981,6 +982,7 @@ bool ARMInstructionSelector::select(MachineInstr &I, } } + assert(!STI.isThumb() && "Unsupported subtarget"); I.setDesc(TII.get(ARM::MOVi)); MIB.add(predOps(ARMCC::AL)).add(condCodeOp()); break; |
