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authorSimon Pilgrim <llvm-dev@redking.me.uk>2018-09-19 18:59:08 +0000
committerSimon Pilgrim <llvm-dev@redking.me.uk>2018-09-19 18:59:08 +0000
commit2d0f20cc043458c945e4959c5b130c07a7f5b8b5 (patch)
tree4c6c2685582012433738444bea2cce36c82c7b04 /llvm/lib/Target
parent894c39f770298e8972d3518c9b3531b59c819f56 (diff)
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[X86] Handle COPYs of physregs better (regalloc hints)
Enable enableMultipleCopyHints() on X86. Original Patch by @jonpa: While enabling the mischeduler for SystemZ, it was discovered that for some reason a test needed one extra seemingly needless COPY (test/CodeGen/SystemZ/call-03.ll). The handling for that is resulted in this patch, which improves the register coalescing by providing not just one copy hint, but a sorted list of copy hints. On SystemZ, this gives ~12500 less register moves on SPEC, as well as marginally less spilling. Instead of improving just the SystemZ backend, the improvement has been implemented in common-code (calculateSpillWeightAndHint(). This gives a lot of test failures, but since this should be a general improvement I hope that the involved targets will help and review the test updates. Differential Revision: https://reviews.llvm.org/D38128 llvm-svn: 342578
Diffstat (limited to 'llvm/lib/Target')
-rw-r--r--llvm/lib/Target/X86/X86RegisterInfo.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86RegisterInfo.h b/llvm/lib/Target/X86/X86RegisterInfo.h
index 29401dadead..e72dc11cbf9 100644
--- a/llvm/lib/Target/X86/X86RegisterInfo.h
+++ b/llvm/lib/Target/X86/X86RegisterInfo.h
@@ -95,6 +95,8 @@ public:
unsigned getRegPressureLimit(const TargetRegisterClass *RC,
MachineFunction &MF) const override;
+ bool enableMultipleCopyHints() const override { return true; }
+
/// getCalleeSavedRegs - Return a null-terminated list of all of the
/// callee-save registers on this target.
const MCPhysReg *
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