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authorReid Kleckner <rnk@google.com>2019-08-20 22:08:57 +0000
committerReid Kleckner <rnk@google.com>2019-08-20 22:08:57 +0000
commit22fb734907e004b057a4f97da5a3f8b90bf350cf (patch)
tree6b449ff4584e1b02eafbe758cb0b98d33aa637d9 /llvm/lib/Target
parentb2232a1af3211f6d9b279f102653d505b1fe76b2 (diff)
downloadbcm5719-llvm-22fb734907e004b057a4f97da5a3f8b90bf350cf.tar.gz
bcm5719-llvm-22fb734907e004b057a4f97da5a3f8b90bf350cf.zip
Revert [WinEH] Allocate space in funclets stack to save XMM CSRs
This reverts r367088 (git commit 9ad565f70ec5fd3531056d7c939302d4ea970c83) And the follow up fix r368631 / e9865b9b31bb2e6bc742dc6fca8f9f9517c3c43e llvm-svn: 369457
Diffstat (limited to 'llvm/lib/Target')
-rw-r--r--llvm/lib/Target/X86/X86FrameLowering.cpp144
-rw-r--r--llvm/lib/Target/X86/X86FrameLowering.h4
-rw-r--r--llvm/lib/Target/X86/X86MachineFunctionInfo.h13
3 files changed, 26 insertions, 135 deletions
diff --git a/llvm/lib/Target/X86/X86FrameLowering.cpp b/llvm/lib/Target/X86/X86FrameLowering.cpp
index 311510fed6e..981277a520f 100644
--- a/llvm/lib/Target/X86/X86FrameLowering.cpp
+++ b/llvm/lib/Target/X86/X86FrameLowering.cpp
@@ -935,10 +935,7 @@ bool X86FrameLowering::has128ByteRedZone(const MachineFunction& MF) const {
; calls @llvm.eh.unwind.init
[if needs FP]
[for all callee-saved XMM registers]
- [if funclet]
- movaps %<xmm reg>, -MMM(%rsp)
- [else]
- movaps %<xmm reg>, -MMM(%rbp)
+ movaps %<xmm reg>, -MMM(%rbp)
[for all callee-saved XMM registers]
.seh_savexmm %<xmm reg>, (-MMM + SEHFrameOffset)
; i.e. the offset relative to (%rbp - SEHFrameOffset)
@@ -958,10 +955,7 @@ bool X86FrameLowering::has128ByteRedZone(const MachineFunction& MF) const {
; Emit CFI info
[if needs FP]
[for all callee-saved registers]
- [if funclet]
- movaps -MMM(%rsp), %<xmm reg>
- [else]
- .cfi_offset %<reg>, (offset from %rbp)
+ .cfi_offset %<reg>, (offset from %rbp)
[else]
.cfi_def_cfa_offset (offset from RETADDR)
[for all callee-saved registers]
@@ -1176,16 +1170,11 @@ void X86FrameLowering::emitPrologue(MachineFunction &MF,
MFI.setOffsetAdjustment(-StackSize);
}
- // For EH funclets, only allocate enough space for outgoing calls and callee
- // saved XMM registers on Windows 64 bits. Save the NumBytes value that we
- // would've used for the parent frame.
- int XMMFrameSlotOrigin;
+ // For EH funclets, only allocate enough space for outgoing calls. Save the
+ // NumBytes value that we would've used for the parent frame.
unsigned ParentFrameNumBytes = NumBytes;
- if (IsFunclet) {
+ if (IsFunclet)
NumBytes = getWinEHFuncletFrameSize(MF);
- if (IsWin64Prologue)
- NumBytes += X86FI->getCalleeSavedXMMFrameInfo(XMMFrameSlotOrigin);
- }
// Skip the callee-saved push instructions.
bool PushedRegs = false;
@@ -1393,33 +1382,19 @@ void X86FrameLowering::emitPrologue(MachineFunction &MF,
}
while (MBBI != MBB.end() && MBBI->getFlag(MachineInstr::FrameSetup)) {
- auto FrameInstr = MBBI;
+ const MachineInstr &FrameInstr = *MBBI;
++MBBI;
if (NeedsWinCFI) {
int FI;
- if (unsigned Reg = TII.isStoreToStackSlot(*FrameInstr, FI)) {
+ if (unsigned Reg = TII.isStoreToStackSlot(FrameInstr, FI)) {
if (X86::FR64RegClass.contains(Reg)) {
- int Offset = 0;
+ unsigned IgnoredFrameReg;
+ int Offset = getFrameIndexReference(MF, FI, IgnoredFrameReg);
+ Offset += SEHFrameOffset;
+
HasWinCFI = true;
- if (IsFunclet) {
- assert(IsWin64Prologue && "Only valid on Windows 64bit");
- unsigned Size = TRI->getSpillSize(X86::VR128RegClass);
- unsigned Align = TRI->getSpillAlignment(X86::VR128RegClass);
- Offset = (FI - XMMFrameSlotOrigin - 1) * Size +
- alignDown(NumBytes, Align);
- addRegOffset(BuildMI(MBB, MBBI, DL,
- TII.get(getXMMAlignedLoadStoreOp(false))),
- StackPtr, true, Offset)
- .addReg(Reg)
- .setMIFlag(MachineInstr::FrameSetup);
- MBB.erase(FrameInstr);
- } else {
- assert(!NeedsWinFPO && "SEH_SaveXMM incompatible with FPO data");
- unsigned IgnoredFrameReg;
- Offset = getFrameIndexReference(MF, FI, IgnoredFrameReg) +
- SEHFrameOffset;
- }
+ assert(!NeedsWinFPO && "SEH_SaveXMM incompatible with FPO data");
BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_SaveXMM))
.addImm(Reg)
.addImm(Offset)
@@ -1639,9 +1614,6 @@ void X86FrameLowering::emitEpilogue(MachineFunction &MF,
if (IsFunclet) {
assert(HasFP && "EH funclets without FP not yet implemented");
NumBytes = getWinEHFuncletFrameSize(MF);
- int Ignore;
- if (IsWin64Prologue)
- NumBytes += X86FI->getCalleeSavedXMMFrameInfo(Ignore);
} else if (HasFP) {
// Calculate required stack adjustment.
uint64_t FrameSize = StackSize - SlotSize;
@@ -1969,8 +1941,6 @@ bool X86FrameLowering::assignCalleeSavedSpillSlots(
X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>();
unsigned CalleeSavedFrameSize = 0;
- unsigned CalleeSavedXMMFrameSize = 0;
- int CalleeSavedXMMSlotOrigin = 0;
int SpillSlotOffset = getOffsetOfLocalArea() + X86FI->getTCReturnAddrDelta();
int64_t TailCallReturnAddrDelta = X86FI->getTCReturnAddrDelta();
@@ -2034,44 +2004,9 @@ bool X86FrameLowering::assignCalleeSavedSpillSlots(
MFI.setCVBytesOfCalleeSavedRegisters(CalleeSavedFrameSize);
// Assign slots for XMMs.
- for (unsigned i = CSI.size(), Size = 0; i != 0; --i) {
- unsigned Reg = CSI[i - 1].getReg();
- // According to Microsoft "x64 software conventions", only XMM registers
- // are nonvolatile except the GPR.
- if (!X86::VR128RegClass.contains(Reg))
- continue;
- // Since all registers have the same size, we just initialize once.
- if (Size == 0) {
- unsigned Align = TRI->getSpillAlignment(X86::VR128RegClass);
- // ensure alignment
- int Remainder = SpillSlotOffset % Align;
- if (Remainder < 0)
- SpillSlotOffset -= Align + Remainder;
- else
- SpillSlotOffset -= Remainder;
- MFI.ensureMaxAlignment(Align);
- Size = TRI->getSpillSize(X86::VR128RegClass);
- }
- // spill into slot
- SpillSlotOffset -= Size;
- int SlotIndex = MFI.CreateFixedSpillStackObject(Size, SpillSlotOffset);
- CSI[i - 1].setFrameIdx(SlotIndex);
- // Since we allocate XMM slot consecutively in stack, we just need to
- // record the first one for the funclet use.
- if (CalleeSavedXMMFrameSize == 0) {
- CalleeSavedXMMSlotOrigin = SlotIndex;
- }
- CalleeSavedXMMFrameSize += Size;
- }
-
- X86FI->setCalleeSavedXMMFrameInfo(CalleeSavedXMMFrameSize,
- CalleeSavedXMMSlotOrigin);
-
- // Assign slots for others.
for (unsigned i = CSI.size(); i != 0; --i) {
unsigned Reg = CSI[i - 1].getReg();
- if (X86::GR64RegClass.contains(Reg) || X86::GR32RegClass.contains(Reg) ||
- X86::VR128RegClass.contains(Reg))
+ if (X86::GR64RegClass.contains(Reg) || X86::GR32RegClass.contains(Reg))
continue;
// If this is k-register make sure we lookup via the largest legal type.
@@ -2083,11 +2018,7 @@ bool X86FrameLowering::assignCalleeSavedSpillSlots(
unsigned Size = TRI->getSpillSize(*RC);
unsigned Align = TRI->getSpillAlignment(*RC);
// ensure alignment
- int Remainder = SpillSlotOffset % Align;
- if (Remainder < 0)
- SpillSlotOffset -= Align + Remainder;
- else
- SpillSlotOffset -= Remainder;
+ SpillSlotOffset -= std::abs(SpillSlotOffset) % Align;
// spill into slot
SpillSlotOffset -= Size;
int SlotIndex = MFI.CreateFixedSpillStackObject(Size, SpillSlotOffset);
@@ -2226,32 +2157,19 @@ bool X86FrameLowering::restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
DebugLoc DL = MBB.findDebugLoc(MI);
// Reload XMMs from stack frame.
- MachineFunction &MF = *MBB.getParent();
- X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>();
- int XMMFrameSlotOrigin;
- int SEHFrameOffset = X86FI->getCalleeSavedXMMFrameInfo(XMMFrameSlotOrigin) +
- MF.getFrameInfo().getMaxCallFrameSize();
for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
unsigned Reg = CSI[i].getReg();
- if (MBB.isEHFuncletEntry() && STI.is64Bit()) {
- if (X86::VR128RegClass.contains(Reg)) {
- int Offset = (CSI[i].getFrameIdx() - XMMFrameSlotOrigin - 1) * 16;
- addRegOffset(BuildMI(MBB, MI, DL,
- TII.get(getXMMAlignedLoadStoreOp(true)), Reg),
- X86::RSP, true, SEHFrameOffset + Offset);
- }
- } else {
- if (X86::GR64RegClass.contains(Reg) || X86::GR32RegClass.contains(Reg))
- continue;
+ if (X86::GR64RegClass.contains(Reg) ||
+ X86::GR32RegClass.contains(Reg))
+ continue;
- // If this is k-register make sure we lookup via the largest legal type.
- MVT VT = MVT::Other;
- if (X86::VK16RegClass.contains(Reg))
- VT = STI.hasBWI() ? MVT::v64i1 : MVT::v16i1;
+ // If this is k-register make sure we lookup via the largest legal type.
+ MVT VT = MVT::Other;
+ if (X86::VK16RegClass.contains(Reg))
+ VT = STI.hasBWI() ? MVT::v64i1 : MVT::v16i1;
- const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg, VT);
- TII.loadRegFromStackSlot(MBB, MI, Reg, CSI[i].getFrameIdx(), RC, TRI);
- }
+ const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg, VT);
+ TII.loadRegFromStackSlot(MBB, MI, Reg, CSI[i].getFrameIdx(), RC, TRI);
}
// POP GPRs.
@@ -3191,19 +3109,14 @@ void X86FrameLowering::orderFrameObjects(
std::reverse(ObjectsToAllocate.begin(), ObjectsToAllocate.end());
}
-unsigned
-X86FrameLowering::getWinEHParentFrameOffset(const MachineFunction &MF) const {
- const X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>();
+
+unsigned X86FrameLowering::getWinEHParentFrameOffset(const MachineFunction &MF) const {
// RDX, the parent frame pointer, is homed into 16(%rsp) in the prologue.
unsigned Offset = 16;
// RBP is immediately pushed.
Offset += SlotSize;
// All callee-saved registers are then pushed.
- Offset += X86FI->getCalleeSavedFrameSize();
- // Funclets allocate space for however XMM registers are required.
- int Ignore;
- if (MF.getTarget().getMCAsmInfo()->usesWindowsCFI())
- Offset += X86FI->getCalleeSavedXMMFrameInfo(Ignore);
+ Offset += MF.getInfo<X86MachineFunctionInfo>()->getCalleeSavedFrameSize();
// Every funclet allocates enough stack space for the largest outgoing call.
Offset += getWinEHFuncletFrameSize(MF);
return Offset;
@@ -3265,8 +3178,3 @@ void X86FrameLowering::processFunctionBeforeFrameFinalized(
UnwindHelpFI)
.addImm(-2);
}
-
-unsigned X86FrameLowering::getXMMAlignedLoadStoreOp(const bool IsLoad) const {
- return IsLoad ? (STI.hasAVX() ? X86::VMOVAPSrm : X86::MOVAPSrm)
- : (STI.hasAVX() ? X86::VMOVAPSmr : X86::MOVAPSmr);
-}
diff --git a/llvm/lib/Target/X86/X86FrameLowering.h b/llvm/lib/Target/X86/X86FrameLowering.h
index 5e534461177..d32746e3a36 100644
--- a/llvm/lib/Target/X86/X86FrameLowering.h
+++ b/llvm/lib/Target/X86/X86FrameLowering.h
@@ -217,10 +217,6 @@ private:
void emitCatchRetReturnValue(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MBBI,
MachineInstr *CatchRet) const;
-
- /// Select the best opcode for the subtarget when funclet XMM CSRs
- /// save/restore.
- unsigned getXMMAlignedLoadStoreOp(const bool IsLoad) const;
};
} // End llvm namespace
diff --git a/llvm/lib/Target/X86/X86MachineFunctionInfo.h b/llvm/lib/Target/X86/X86MachineFunctionInfo.h
index a160f618b23..d7e535598d8 100644
--- a/llvm/lib/Target/X86/X86MachineFunctionInfo.h
+++ b/llvm/lib/Target/X86/X86MachineFunctionInfo.h
@@ -40,14 +40,6 @@ class X86MachineFunctionInfo : public MachineFunctionInfo {
/// stack frame in bytes.
unsigned CalleeSavedFrameSize = 0;
- /// CalleeSavedXMMFrameSize - Size of the callee-saved XMM register portion
- /// of the stack frame in bytes.
- unsigned CalleeSavedXMMFrameSize = 0;
-
- /// CalleeSavedXMMFrameOrigin - Origin slot of the callee-saved XMM register
- /// portion of the stack frame.
- int CalleeSavedXMMFrameOrigin = 0;
-
/// BytesToPopOnReturn - Number of bytes function pops on return (in addition
/// to the space used by the return address).
/// Used on windows platform for stdcall & fastcall name decoration
@@ -131,11 +123,6 @@ public:
unsigned getCalleeSavedFrameSize() const { return CalleeSavedFrameSize; }
void setCalleeSavedFrameSize(unsigned bytes) { CalleeSavedFrameSize = bytes; }
- unsigned getCalleeSavedXMMFrameInfo(int &origin) const
- { origin = CalleeSavedXMMFrameOrigin; return CalleeSavedXMMFrameSize; }
- void setCalleeSavedXMMFrameInfo(unsigned size, int origin)
- { CalleeSavedXMMFrameSize = size; CalleeSavedXMMFrameOrigin = origin; }
-
unsigned getBytesToPopOnReturn() const { return BytesToPopOnReturn; }
void setBytesToPopOnReturn (unsigned bytes) { BytesToPopOnReturn = bytes;}
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