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| author | Anton Korobeynikov <asl@math.spbu.ru> | 2010-03-14 18:42:38 +0000 |
|---|---|---|
| committer | Anton Korobeynikov <asl@math.spbu.ru> | 2010-03-14 18:42:38 +0000 |
| commit | 0a65a37344a4742421b1910e8dc77834e7e16056 (patch) | |
| tree | be4aad626329fb434dba8d174821cd86fe398cb1 /llvm/lib/Target | |
| parent | d7fece38fc3ca2052ed1a4d2850648eb14ee3613 (diff) | |
| download | bcm5719-llvm-0a65a37344a4742421b1910e8dc77834e7e16056.tar.gz bcm5719-llvm-0a65a37344a4742421b1910e8dc77834e7e16056.zip | |
Add substarget feature for FP16
llvm-svn: 98503
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/ARM/ARM.td | 2 | ||||
| -rw-r--r-- | llvm/lib/Target/ARM/ARMISelLowering.cpp | 2 | ||||
| -rw-r--r-- | llvm/lib/Target/ARM/ARMSubtarget.cpp | 1 | ||||
| -rw-r--r-- | llvm/lib/Target/ARM/ARMSubtarget.h | 6 |
4 files changed, 10 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARM.td b/llvm/lib/Target/ARM/ARM.td index 70338612d9c..bbb1dbdc9a4 100644 --- a/llvm/lib/Target/ARM/ARM.td +++ b/llvm/lib/Target/ARM/ARM.td @@ -40,6 +40,8 @@ def FeatureNEON : SubtargetFeature<"neon", "ARMFPUType", "NEON", "Enable NEON instructions">; def FeatureThumb2 : SubtargetFeature<"thumb2", "ThumbMode", "Thumb2", "Enable Thumb2 instructions">; +def FeatureFP16 : SubtargetFeature<"fp16", "HasFP16", "true", + "Enable half-precision floating point">; //===----------------------------------------------------------------------===// // ARM Processors supported. diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp index d37a36eb7b3..ac210685c06 100644 --- a/llvm/lib/Target/ARM/ARMISelLowering.cpp +++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp @@ -436,7 +436,7 @@ ARMTargetLowering::ARMTargetLowering(TargetMachine &TM) setOperationAction(ISD::FP_TO_SINT, MVT::i32, Custom); } // Special handling for half-precision FP. - if (Subtarget->hasVFP3()) { + if (Subtarget->hasVFP3() && Subtarget->hasFP16()) { setOperationAction(ISD::FP16_TO_FP32, MVT::f32, Custom); setOperationAction(ISD::FP32_TO_FP16, MVT::i32, Custom); } diff --git a/llvm/lib/Target/ARM/ARMSubtarget.cpp b/llvm/lib/Target/ARM/ARMSubtarget.cpp index 622034bd2d9..2dad7f11062 100644 --- a/llvm/lib/Target/ARM/ARMSubtarget.cpp +++ b/llvm/lib/Target/ARM/ARMSubtarget.cpp @@ -41,6 +41,7 @@ ARMSubtarget::ARMSubtarget(const std::string &TT, const std::string &FS, , PostRAScheduler(false) , IsR9Reserved(ReserveR9) , UseMovt(UseMOVT) + , HasFP16(false) , stackAlignment(4) , CPUString("generic") , TargetType(isELF) // Default to ELF unless otherwise specified. diff --git a/llvm/lib/Target/ARM/ARMSubtarget.h b/llvm/lib/Target/ARM/ARMSubtarget.h index 4d36036b189..2dc81a4d6d2 100644 --- a/llvm/lib/Target/ARM/ARMSubtarget.h +++ b/llvm/lib/Target/ARM/ARMSubtarget.h @@ -66,6 +66,10 @@ protected: /// imms (including global addresses). bool UseMovt; + /// HasFP16 - True if subtarget supports half-precision FP (We support VFP+HF + /// only so far) + bool HasFP16; + /// stackAlignment - The minimum alignment known to hold of the stack frame on /// entry to the function and which must be maintained by every function. unsigned stackAlignment; @@ -116,6 +120,8 @@ protected: bool useNEONForSinglePrecisionFP() const { return hasNEON() && UseNEONForSinglePrecisionFP; } + bool hasFP16() const { return HasFP16; } + bool isTargetDarwin() const { return TargetType == isDarwin; } bool isTargetELF() const { return TargetType == isELF; } |

