diff options
| author | Jina Nahias <jina.nahias@intel.com> | 2017-10-30 09:59:52 +0000 |
|---|---|---|
| committer | Jina Nahias <jina.nahias@intel.com> | 2017-10-30 09:59:52 +0000 |
| commit | 70280f9a0dbbecae6a14e78a84e4e4414bf984ad (patch) | |
| tree | 025adcf645ec5423a1e92df3b4258ab904a8fd6f /llvm/lib/Target/X86 | |
| parent | 390fc5777165656acac5bf8ffbb2ea2dec2ca00b (diff) | |
| download | bcm5719-llvm-70280f9a0dbbecae6a14e78a84e4e4414bf984ad.tar.gz bcm5719-llvm-70280f9a0dbbecae6a14e78a84e4e4414bf984ad.zip | |
[X86][AVX512] Adding a pattern for broadcastm intrinsic.
Differential Revision: https://reviews.llvm.org/D38312
Change-Id: I6551fb13879e098aed74de410e29815cf37d9ab5
llvm-svn: 316890
Diffstat (limited to 'llvm/lib/Target/X86')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 64 |
1 files changed, 64 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 6fb94700b9f..02b83e2e3fa 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -6687,6 +6687,44 @@ static bool isUseOfShuffle(SDNode *N) { return false; } +// Check if the current node of build vector is a zero extended vector. +// If so, return the value extended. +// For example: (0,0,0,a,0,0,0,a,0,0,0,a,0,0,0,a) returns a. +// NumElt - return the number of zero extended identical values. +// EltType - return the type of the value include the zero extend. +static SDValue isSplatZeroExtended(const BuildVectorSDNode *Op, + unsigned &NumElt, MVT &EltType) { + SDValue ExtValue = Op->getOperand(0); + unsigned NumElts = Op->getNumOperands(); + unsigned Delta = NumElts; + + for (unsigned i = 1; i < NumElts; i++) { + if (Op->getOperand(i) == ExtValue) { + Delta = i; + break; + } + if (!(Op->getOperand(i).isUndef() || isNullConstant(Op->getOperand(i)))) + return SDValue(); + } + if (!isPowerOf2_32(Delta) || Delta == 1) + return SDValue(); + + for (unsigned i = Delta; i < NumElts; i++) { + if (i % Delta == 0) { + if (Op->getOperand(i) != ExtValue) + return SDValue(); + } else if (!(isNullConstant(Op->getOperand(i)) || + Op->getOperand(i).isUndef())) + return SDValue(); + } + unsigned EltSize = + Op->getSimpleValueType(0).getScalarSizeInBits(); + unsigned ExtVTSize = EltSize * Delta; + EltType = MVT::getIntegerVT(ExtVTSize); + NumElt = NumElts / Delta; + return ExtValue; +} + /// Attempt to use the vbroadcast instruction to generate a splat value /// from a splat BUILD_VECTOR which uses: /// a. A single scalar load, or a constant. @@ -6709,6 +6747,32 @@ static SDValue lowerBuildVectorAsBroadcast(BuildVectorSDNode *BVOp, assert((VT.is128BitVector() || VT.is256BitVector() || VT.is512BitVector()) && "Unsupported vector type for broadcast."); + // Attempt to use VBROADCASTM + // From this paterrn: + // a. t0 = (zext_i64 (bitcast_i8 v2i1 X)) + // b. t1 = (build_vector t0 t0) + // + // Create (VBROADCASTM v2i1 X) + if (Subtarget.hasCDI() && (VT.is512BitVector() || Subtarget.hasVLX())) { + MVT EltType; + unsigned NumElts; + SDValue ZeroExtended = isSplatZeroExtended(BVOp, NumElts, EltType); + if (ZeroExtended && ZeroExtended.getOpcode() == ISD::BITCAST) { + SDValue BOperand = ZeroExtended.getOperand(0); + if (BOperand.getSimpleValueType().getVectorElementType() == MVT::i1) { + if ((EltType == MVT::i64 && + VT.getVectorElementType() == MVT::i8) || // for broadcastmb2q + (EltType == MVT::i32 && + VT.getVectorElementType() == MVT::i16)) { // for broadcastmw2d + SDValue Brdcst = + DAG.getNode(X86ISD::VBROADCASTM, dl, + MVT::getVectorVT(EltType, NumElts), BOperand); + return DAG.getBitcast(VT, Brdcst); + } + } + } + } + BitVector UndefElements; SDValue Ld = BVOp->getSplatValue(&UndefElements); |

