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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-04-12 14:31:42 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-04-12 14:31:42 +0000 |
| commit | 8904a86f65b8e7a1a28ec188659d735b3970a883 (patch) | |
| tree | 69a793c3d3b50327aebc823e4dc51cbb6edc5701 /llvm/lib/Target/X86/X86InstrAVX512.td | |
| parent | c645f61ada2ae07a95d392377c828cf18bf47e32 (diff) | |
| download | bcm5719-llvm-8904a86f65b8e7a1a28ec188659d735b3970a883.tar.gz bcm5719-llvm-8904a86f65b8e7a1a28ec188659d735b3970a883.zip | |
[X86] Remove AES/CLMUL/CRC32/LDDQU/MOVNT/POPCNT/SHA schedule itineraries (PR37093)
llvm-svn: 329912
Diffstat (limited to 'llvm/lib/Target/X86/X86InstrAVX512.td')
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrAVX512.td | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/llvm/lib/Target/X86/X86InstrAVX512.td b/llvm/lib/Target/X86/X86InstrAVX512.td index 5751e6c946e..e99d6c3337d 100644 --- a/llvm/lib/Target/X86/X86InstrAVX512.td +++ b/llvm/lib/Target/X86/X86InstrAVX512.td @@ -4267,13 +4267,12 @@ let SchedRW = [WriteVecLoad] in { } multiclass avx512_movnt<bits<8> opc, string OpcodeStr, X86VectorVTInfo _, - PatFrag st_frag = alignednontemporalstore, - InstrItinClass itin = IIC_SSE_MOVNT> { + PatFrag st_frag = alignednontemporalstore> { let SchedRW = [WriteVecStore], AddedComplexity = 400 in def mr : AVX512PI<opc, MRMDestMem, (outs), (ins _.MemOp:$dst, _.RC:$src), !strconcat(OpcodeStr, "\t{$src, $dst|$dst, $src}"), [(st_frag (_.VT _.RC:$src), addr:$dst)], - _.ExeDomain, itin>, EVEX, EVEX_CD8<_.EltSize, CD8VF>; + _.ExeDomain>, EVEX, EVEX_CD8<_.EltSize, CD8VF>; } multiclass avx512_movnt_vl<bits<8> opc, string OpcodeStr, |
