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authorBill Wendling <isanbard@gmail.com>2010-03-11 19:50:31 +0000
committerBill Wendling <isanbard@gmail.com>2010-03-11 19:50:31 +0000
commit00810c39daf1dd00ac965d8163ea331adfe7c974 (patch)
tree0fd64f2c1e1ffa549382ac4677d1e8cd9d0e9a69 /llvm/lib/Target/X86/X86ISelLowering.cpp
parent86838aafeee5c49ae87c33053742f2289dfda4fd (diff)
downloadbcm5719-llvm-00810c39daf1dd00ac965d8163ea331adfe7c974.tar.gz
bcm5719-llvm-00810c39daf1dd00ac965d8163ea331adfe7c974.zip
revert r98270.
llvm-svn: 98281
Diffstat (limited to 'llvm/lib/Target/X86/X86ISelLowering.cpp')
-rw-r--r--llvm/lib/Target/X86/X86ISelLowering.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 88e2fa15ee7..9b7f6fc6aee 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -2091,7 +2091,7 @@ X86TargetLowering::LowerCall(SDValue Chain, SDValue Callee,
// tailcall must happen after callee-saved registers are poped.
// FIXME: Give it a special register class that contains caller-saved
// register instead?
- unsigned TCReg = Is64Bit ? X86::R11 : X86::ECX;
+ unsigned TCReg = Is64Bit ? X86::R11 : X86::EAX;
Chain = DAG.getCopyToReg(Chain, dl,
DAG.getRegister(TCReg, getPointerTy()),
Callee,InFlag);
@@ -2145,7 +2145,7 @@ X86TargetLowering::LowerCall(SDValue Chain, SDValue Callee,
}
assert(((Callee.getOpcode() == ISD::Register &&
- (cast<RegisterSDNode>(Callee)->getReg() == X86::ECX ||
+ (cast<RegisterSDNode>(Callee)->getReg() == X86::EAX ||
cast<RegisterSDNode>(Callee)->getReg() == X86::R11)) ||
Callee.getOpcode() == ISD::TargetExternalSymbol ||
Callee.getOpcode() == ISD::TargetGlobalAddress) &&
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