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authorEvan Cheng <evan.cheng@apple.com>2010-11-30 23:55:39 +0000
committerEvan Cheng <evan.cheng@apple.com>2010-11-30 23:55:39 +0000
commitd4b0873c06de66a00e28850f31c227995ecb1592 (patch)
tree39429808ff237190ba3ba4083cded67bc2ba0496 /llvm/lib/Target/X86/X86FrameInfo.cpp
parent05632cb5cc06765c692dfd45d99cedf65e6d142e (diff)
downloadbcm5719-llvm-d4b0873c06de66a00e28850f31c227995ecb1592.tar.gz
bcm5719-llvm-d4b0873c06de66a00e28850f31c227995ecb1592.zip
Enable sibling call optimization of libcalls which are expanded during
legalization time. Since at legalization time there is no mapping from SDNode back to the corresponding LLVM instruction and the return SDNode is target specific, this requires a target hook to check for eligibility. Only x86 and ARM support this form of sibcall optimization right now. rdar://8707777 llvm-svn: 120501
Diffstat (limited to 'llvm/lib/Target/X86/X86FrameInfo.cpp')
-rw-r--r--llvm/lib/Target/X86/X86FrameInfo.cpp15
1 files changed, 11 insertions, 4 deletions
diff --git a/llvm/lib/Target/X86/X86FrameInfo.cpp b/llvm/lib/Target/X86/X86FrameInfo.cpp
index 494e9050282..c47b0fa6970 100644
--- a/llvm/lib/Target/X86/X86FrameInfo.cpp
+++ b/llvm/lib/Target/X86/X86FrameInfo.cpp
@@ -712,10 +712,17 @@ void X86FrameInfo::emitEpilogue(MachineFunction &MF,
// Jump to label or value in register.
if (RetOpcode == X86::TCRETURNdi || RetOpcode == X86::TCRETURNdi64) {
- BuildMI(MBB, MBBI, DL, TII.get((RetOpcode == X86::TCRETURNdi)
- ? X86::TAILJMPd : X86::TAILJMPd64)).
- addGlobalAddress(JumpTarget.getGlobal(), JumpTarget.getOffset(),
- JumpTarget.getTargetFlags());
+ MachineInstrBuilder MIB =
+ BuildMI(MBB, MBBI, DL, TII.get((RetOpcode == X86::TCRETURNdi)
+ ? X86::TAILJMPd : X86::TAILJMPd64));
+ if (JumpTarget.isGlobal())
+ MIB.addGlobalAddress(JumpTarget.getGlobal(), JumpTarget.getOffset(),
+ JumpTarget.getTargetFlags());
+ else {
+ assert(JumpTarget.isSymbol());
+ MIB.addExternalSymbol(JumpTarget.getSymbolName(),
+ JumpTarget.getTargetFlags());
+ }
} else if (RetOpcode == X86::TCRETURNmi || RetOpcode == X86::TCRETURNmi64) {
MachineInstrBuilder MIB =
BuildMI(MBB, MBBI, DL, TII.get((RetOpcode == X86::TCRETURNmi)
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