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| author | Craig Topper <craig.topper@intel.com> | 2017-08-30 23:05:54 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2017-08-30 23:05:54 +0000 |
| commit | ead876b8e8b939faae961f3e42f20b4408181876 (patch) | |
| tree | ad33d2862036583c7f303ff4913982aec6db7f41 /llvm/lib/Target/X86/X86FastISel.cpp | |
| parent | d92f3982cea68130fbb846fadf8677073940238e (diff) | |
| download | bcm5719-llvm-ead876b8e8b939faae961f3e42f20b4408181876.tar.gz bcm5719-llvm-ead876b8e8b939faae961f3e42f20b4408181876.zip | |
[X86] Remove some code from fast isel that is no longer needed with i1 being an illegal type.
llvm-svn: 312190
Diffstat (limited to 'llvm/lib/Target/X86/X86FastISel.cpp')
| -rw-r--r-- | llvm/lib/Target/X86/X86FastISel.cpp | 31 |
1 files changed, 0 insertions, 31 deletions
diff --git a/llvm/lib/Target/X86/X86FastISel.cpp b/llvm/lib/Target/X86/X86FastISel.cpp index ef83cac3baf..3bdba662c5e 100644 --- a/llvm/lib/Target/X86/X86FastISel.cpp +++ b/llvm/lib/Target/X86/X86FastISel.cpp @@ -1237,16 +1237,6 @@ bool X86FastISel::X86SelectRet(const Instruction *I) { if (SrcVT == MVT::i1) { if (Outs[0].Flags.isSExt()) return false; - // In case SrcReg is a K register, COPY to a GPR - if (MRI.getRegClass(SrcReg) == &X86::VK1RegClass) { - unsigned KSrcReg = SrcReg; - SrcReg = createResultReg(&X86::GR32RegClass); - BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, - TII.get(TargetOpcode::COPY), SrcReg) - .addReg(KSrcReg); - SrcReg = fastEmitInst_extractsubreg(MVT::i8, SrcReg, /*Kill=*/true, - X86::sub_8bit); - } SrcReg = fastEmitZExtFromI1(MVT::i8, SrcReg, /*TODO: Kill=*/false); SrcVT = MVT::i8; } @@ -1538,17 +1528,6 @@ bool X86FastISel::X86SelectZExt(const Instruction *I) { // Handle zero-extension from i1 to i8, which is common. MVT SrcVT = TLI.getSimpleValueType(DL, I->getOperand(0)->getType()); if (SrcVT == MVT::i1) { - // In case ResultReg is a K register, COPY to a GPR - if (MRI.getRegClass(ResultReg) == &X86::VK1RegClass) { - unsigned KResultReg = ResultReg; - ResultReg = createResultReg(&X86::GR32RegClass); - BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, - TII.get(TargetOpcode::COPY), ResultReg) - .addReg(KResultReg); - ResultReg = fastEmitInst_extractsubreg(MVT::i8, ResultReg, /*Kill=*/true, - X86::sub_8bit); - } - // Set the high bits to zero. ResultReg = fastEmitZExtFromI1(MVT::i8, ResultReg, /*TODO: Kill=*/false); SrcVT = MVT::i8; @@ -3282,16 +3261,6 @@ bool X86FastISel::fastLowerCall(CallLoweringInfo &CLI) { // Handle zero-extension from i1 to i8, which is common. if (ArgVT == MVT::i1) { - // In case SrcReg is a K register, COPY to a GPR - if (MRI.getRegClass(ArgReg) == &X86::VK1RegClass) { - unsigned KArgReg = ArgReg; - ArgReg = createResultReg(&X86::GR32RegClass); - BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, - TII.get(TargetOpcode::COPY), ArgReg) - .addReg(KArgReg); - ArgReg = fastEmitInst_extractsubreg(MVT::i8, ArgReg, /*Kill=*/true, - X86::sub_8bit); - } // Set the high bits to zero. ArgReg = fastEmitZExtFromI1(MVT::i8, ArgReg, /*TODO: Kill=*/false); ArgVT = MVT::i8; |

