[X86] Rewrite printMasking code in X86InstComments to use TSFlags to determine whether the instruction is masked.

This should have been NFC, but it looks like we were missing PUNPCKLHQDQ/PUNPCKLQDQ instructions in there.

llvm-svn: 327200

1 files changed, 16 insertions, 187 deletions

diff --git a/llvm/lib/Target/X86/InstPrinter/X86InstComments.cpp b/llvm/lib/Target/X86/InstPrinter/X86InstComments.cpp
index a46f22ff40f..29395978432 100644
--- a/llvm/lib/Target/X86/InstPrinter/X86InstComments.cpp
+++ b/llvm/lib/Target/X86/InstPrinter/X86InstComments.cpp
@@ -13,10 +13,12 @@
 //===----------------------------------------------------------------------===//
 
 #include "X86InstComments.h"
+#include "MCTargetDesc/X86BaseInfo.h"
 #include "MCTargetDesc/X86MCTargetDesc.h"
 #include "Utils/X86ShuffleDecode.h"
 #include "llvm/CodeGen/MachineValueType.h"
 #include "llvm/MC/MCInst.h"
+#include "llvm/MC/MCInstrInfo.h"
 #include "llvm/Support/raw_ostream.h"
 
 using namespace llvm;
@@ -206,195 +208,21 @@ static MVT getZeroExtensionResultType(const MCInst *MI) {
 
 /// Wraps the destination register name with AVX512 mask/maskz filtering.
 static void printMasking(raw_ostream &OS, const MCInst *MI,
+                         const MCInstrInfo &MCII,
                          const char *(*getRegName)(unsigned)) {
-  bool MaskWithZero = false;
-  const char *MaskRegName = nullptr;
+  const MCInstrDesc &Desc = MCII.get(MI->getOpcode());
+  uint64_t TSFlags = Desc.TSFlags;
 
-  switch (MI->getOpcode()) {
-  default:
+  if (!(TSFlags & X86II::EVEX_K))
     return;
-  CASE_MASKZ_MOVDUP(MOVDDUP, m)
-  CASE_MASKZ_MOVDUP(MOVDDUP, r)
-  CASE_MASKZ_MOVDUP(MOVSHDUP, m)
-  CASE_MASKZ_MOVDUP(MOVSHDUP, r)
-  CASE_MASKZ_MOVDUP(MOVSLDUP, m)
-  CASE_MASKZ_MOVDUP(MOVSLDUP, r)
-  CASE_MASKZ_PMOVZX(PMOVZXBD, m)
-  CASE_MASKZ_PMOVZX(PMOVZXBD, r)
-  CASE_MASKZ_PMOVZX(PMOVZXBQ, m)
-  CASE_MASKZ_PMOVZX(PMOVZXBQ, r)
-  CASE_MASKZ_PMOVZX(PMOVZXBW, m)
-  CASE_MASKZ_PMOVZX(PMOVZXBW, r)
-  CASE_MASKZ_PMOVZX(PMOVZXDQ, m)
-  CASE_MASKZ_PMOVZX(PMOVZXDQ, r)
-  CASE_MASKZ_PMOVZX(PMOVZXWD, m)
-  CASE_MASKZ_PMOVZX(PMOVZXWD, r)
-  CASE_MASKZ_PMOVZX(PMOVZXWQ, m)
-  CASE_MASKZ_PMOVZX(PMOVZXWQ, r)
-  CASE_MASKZ_UNPCK(PUNPCKHBW, m)
-  CASE_MASKZ_UNPCK(PUNPCKHBW, r)
-  CASE_MASKZ_UNPCK(PUNPCKHWD, m)
-  CASE_MASKZ_UNPCK(PUNPCKHWD, r)
-  CASE_MASKZ_UNPCK(PUNPCKHDQ, m)
-  CASE_MASKZ_UNPCK(PUNPCKHDQ, r)
-  CASE_MASKZ_UNPCK(PUNPCKLBW, m)
-  CASE_MASKZ_UNPCK(PUNPCKLBW, r)
-  CASE_MASKZ_UNPCK(PUNPCKLWD, m)
-  CASE_MASKZ_UNPCK(PUNPCKLWD, r)
-  CASE_MASKZ_UNPCK(PUNPCKLDQ, m)
-  CASE_MASKZ_UNPCK(PUNPCKLDQ, r)
-  CASE_MASKZ_UNPCK(UNPCKHPD, m)
-  CASE_MASKZ_UNPCK(UNPCKHPD, r)
-  CASE_MASKZ_UNPCK(UNPCKHPS, m)
-  CASE_MASKZ_UNPCK(UNPCKHPS, r)
-  CASE_MASKZ_UNPCK(UNPCKLPD, m)
-  CASE_MASKZ_UNPCK(UNPCKLPD, r)
-  CASE_MASKZ_UNPCK(UNPCKLPS, m)
-  CASE_MASKZ_UNPCK(UNPCKLPS, r)
-  CASE_MASKZ_SHUF(PALIGNR, r)
-  CASE_MASKZ_SHUF(PALIGNR, m)
-  CASE_MASKZ_SHUF(ALIGNQ, r)
-  CASE_MASKZ_SHUF(ALIGNQ, m)
-  CASE_MASKZ_SHUF(ALIGND, r)
-  CASE_MASKZ_SHUF(ALIGND, m)
-  CASE_MASKZ_SHUF(SHUFPD, m)
-  CASE_MASKZ_SHUF(SHUFPD, r)
-  CASE_MASKZ_SHUF(SHUFPS, m)
-  CASE_MASKZ_SHUF(SHUFPS, r)
-  CASE_MASKZ_VPERMILPI(PERMILPD, m)
-  CASE_MASKZ_VPERMILPI(PERMILPD, r)
-  CASE_MASKZ_VPERMILPI(PERMILPS, m)
-  CASE_MASKZ_VPERMILPI(PERMILPS, r)
-  CASE_MASKZ_VPERMILPI(PSHUFD, m)
-  CASE_MASKZ_VPERMILPI(PSHUFD, r)
-  CASE_MASKZ_VPERMILPI(PSHUFHW, m)
-  CASE_MASKZ_VPERMILPI(PSHUFHW, r)
-  CASE_MASKZ_VPERMILPI(PSHUFLW, m)
-  CASE_MASKZ_VPERMILPI(PSHUFLW, r)
-  CASE_MASKZ_VPERM(PERMPD, m)
-  CASE_MASKZ_VPERM(PERMPD, r)
-  CASE_MASKZ_VPERM(PERMQ, m)
-  CASE_MASKZ_VPERM(PERMQ, r)
-  CASE_MASKZ_VSHUF(64X2, m)
-  CASE_MASKZ_VSHUF(64X2, r)
-  CASE_MASKZ_VSHUF(32X4, m)
-  CASE_MASKZ_VSHUF(32X4, r)
-  CASE_MASKZ_INS_COMMON(BROADCASTF64X2, Z128, rm)
-  CASE_MASKZ_INS_COMMON(BROADCASTI64X2, Z128, rm)
-  CASE_MASKZ_INS_COMMON(BROADCASTF64X2, , rm)
-  CASE_MASKZ_INS_COMMON(BROADCASTI64X2, , rm)
-  CASE_MASKZ_INS_COMMON(BROADCASTF64X4, , rm)
-  CASE_MASKZ_INS_COMMON(BROADCASTI64X4, , rm)
-  CASE_MASKZ_INS_COMMON(BROADCASTF32X4, Z256, rm)
-  CASE_MASKZ_INS_COMMON(BROADCASTI32X4, Z256, rm)
-  CASE_MASKZ_INS_COMMON(BROADCASTF32X4, , rm)
-  CASE_MASKZ_INS_COMMON(BROADCASTI32X4, , rm)
-  CASE_MASKZ_INS_COMMON(BROADCASTF32X8, , rm)
-  CASE_MASKZ_INS_COMMON(BROADCASTI32X8, , rm)
-  CASE_MASKZ_INS_COMMON(BROADCASTI32X2, Z128, r)
-  CASE_MASKZ_INS_COMMON(BROADCASTI32X2, Z128, m)
-  CASE_MASKZ_INS_COMMON(BROADCASTF32X2, Z256, r)
-  CASE_MASKZ_INS_COMMON(BROADCASTI32X2, Z256, r)
-  CASE_MASKZ_INS_COMMON(BROADCASTF32X2, Z256, m)
-  CASE_MASKZ_INS_COMMON(BROADCASTI32X2, Z256, m)
-  CASE_MASKZ_INS_COMMON(BROADCASTF32X2, Z, r)
-  CASE_MASKZ_INS_COMMON(BROADCASTI32X2, Z, r)
-  CASE_MASKZ_INS_COMMON(BROADCASTF32X2, Z, m)
-  CASE_MASKZ_INS_COMMON(BROADCASTI32X2, Z, m)
-    MaskWithZero = true;
-    MaskRegName = getRegName(MI->getOperand(1).getReg());
-    break;
-  CASE_MASK_MOVDUP(MOVDDUP, m)
-  CASE_MASK_MOVDUP(MOVDDUP, r)
-  CASE_MASK_MOVDUP(MOVSHDUP, m)
-  CASE_MASK_MOVDUP(MOVSHDUP, r)
-  CASE_MASK_MOVDUP(MOVSLDUP, m)
-  CASE_MASK_MOVDUP(MOVSLDUP, r)
-  CASE_MASK_PMOVZX(PMOVZXBD, m)
-  CASE_MASK_PMOVZX(PMOVZXBD, r)
-  CASE_MASK_PMOVZX(PMOVZXBQ, m)
-  CASE_MASK_PMOVZX(PMOVZXBQ, r)
-  CASE_MASK_PMOVZX(PMOVZXBW, m)
-  CASE_MASK_PMOVZX(PMOVZXBW, r)
-  CASE_MASK_PMOVZX(PMOVZXDQ, m)
-  CASE_MASK_PMOVZX(PMOVZXDQ, r)
-  CASE_MASK_PMOVZX(PMOVZXWD, m)
-  CASE_MASK_PMOVZX(PMOVZXWD, r)
-  CASE_MASK_PMOVZX(PMOVZXWQ, m)
-  CASE_MASK_PMOVZX(PMOVZXWQ, r)
-  CASE_MASK_UNPCK(PUNPCKHBW, m)
-  CASE_MASK_UNPCK(PUNPCKHBW, r)
-  CASE_MASK_UNPCK(PUNPCKHWD, m)
-  CASE_MASK_UNPCK(PUNPCKHWD, r)
-  CASE_MASK_UNPCK(PUNPCKHDQ, m)
-  CASE_MASK_UNPCK(PUNPCKHDQ, r)
-  CASE_MASK_UNPCK(PUNPCKLBW, m)
-  CASE_MASK_UNPCK(PUNPCKLBW, r)
-  CASE_MASK_UNPCK(PUNPCKLWD, m)
-  CASE_MASK_UNPCK(PUNPCKLWD, r)
-  CASE_MASK_UNPCK(PUNPCKLDQ, m)
-  CASE_MASK_UNPCK(PUNPCKLDQ, r)
-  CASE_MASK_UNPCK(UNPCKHPD, m)
-  CASE_MASK_UNPCK(UNPCKHPD, r)
-  CASE_MASK_UNPCK(UNPCKHPS, m)
-  CASE_MASK_UNPCK(UNPCKHPS, r)
-  CASE_MASK_UNPCK(UNPCKLPD, m)
-  CASE_MASK_UNPCK(UNPCKLPD, r)
-  CASE_MASK_UNPCK(UNPCKLPS, m)
-  CASE_MASK_UNPCK(UNPCKLPS, r)
-  CASE_MASK_SHUF(PALIGNR, r)
-  CASE_MASK_SHUF(PALIGNR, m)
-  CASE_MASK_SHUF(ALIGNQ, r)
-  CASE_MASK_SHUF(ALIGNQ, m)
-  CASE_MASK_SHUF(ALIGND, r)
-  CASE_MASK_SHUF(ALIGND, m)
-  CASE_MASK_SHUF(SHUFPD, m)
-  CASE_MASK_SHUF(SHUFPD, r)
-  CASE_MASK_SHUF(SHUFPS, m)
-  CASE_MASK_SHUF(SHUFPS, r)
-  CASE_MASK_VPERMILPI(PERMILPD, m)
-  CASE_MASK_VPERMILPI(PERMILPD, r)
-  CASE_MASK_VPERMILPI(PERMILPS, m)
-  CASE_MASK_VPERMILPI(PERMILPS, r)
-  CASE_MASK_VPERMILPI(PSHUFD, m)
-  CASE_MASK_VPERMILPI(PSHUFD, r)
-  CASE_MASK_VPERMILPI(PSHUFHW, m)
-  CASE_MASK_VPERMILPI(PSHUFHW, r)
-  CASE_MASK_VPERMILPI(PSHUFLW, m)
-  CASE_MASK_VPERMILPI(PSHUFLW, r)
-  CASE_MASK_VPERM(PERMPD, m)
-  CASE_MASK_VPERM(PERMPD, r)
-  CASE_MASK_VPERM(PERMQ, m)
-  CASE_MASK_VPERM(PERMQ, r)
-  CASE_MASK_VSHUF(64X2, m)
-  CASE_MASK_VSHUF(64X2, r)
-  CASE_MASK_VSHUF(32X4, m)
-  CASE_MASK_VSHUF(32X4, r)
-  CASE_MASK_INS_COMMON(BROADCASTF64X2, Z128, rm)
-  CASE_MASK_INS_COMMON(BROADCASTI64X2, Z128, rm)
-  CASE_MASK_INS_COMMON(BROADCASTF64X2, , rm)
-  CASE_MASK_INS_COMMON(BROADCASTI64X2, , rm)
-  CASE_MASK_INS_COMMON(BROADCASTF64X4, , rm)
-  CASE_MASK_INS_COMMON(BROADCASTI64X4, , rm)
-  CASE_MASK_INS_COMMON(BROADCASTF32X4, Z256, rm)
-  CASE_MASK_INS_COMMON(BROADCASTI32X4, Z256, rm)
-  CASE_MASK_INS_COMMON(BROADCASTF32X4, , rm)
-  CASE_MASK_INS_COMMON(BROADCASTI32X4, , rm)
-  CASE_MASK_INS_COMMON(BROADCASTF32X8, , rm)
-  CASE_MASK_INS_COMMON(BROADCASTI32X8, , rm)
-  CASE_MASK_INS_COMMON(BROADCASTI32X2, Z128, r)
-  CASE_MASK_INS_COMMON(BROADCASTI32X2, Z128, m)
-  CASE_MASK_INS_COMMON(BROADCASTF32X2, Z256, r)
-  CASE_MASK_INS_COMMON(BROADCASTI32X2, Z256, r)
-  CASE_MASK_INS_COMMON(BROADCASTF32X2, Z256, m)
-  CASE_MASK_INS_COMMON(BROADCASTI32X2, Z256, m)
-  CASE_MASK_INS_COMMON(BROADCASTF32X2, Z, r)
-  CASE_MASK_INS_COMMON(BROADCASTI32X2, Z, r)
-  CASE_MASK_INS_COMMON(BROADCASTF32X2, Z, m)
-  CASE_MASK_INS_COMMON(BROADCASTI32X2, Z, m)
-    MaskRegName = getRegName(MI->getOperand(2).getReg());
-    break;
-  }
+
+  bool MaskWithZero = (TSFlags & X86II::EVEX_Z);
+  unsigned MaskOp = Desc.getNumDefs();
+
+  if (Desc.getOperandConstraint(MaskOp, MCOI::TIED_TO) != -1)
+    ++MaskOp;
+
+  const char *MaskRegName = getRegName(MI->getOperand(MaskOp).getReg());
 
   // MASK: zmmX {%kY}
   OS << " {%" << MaskRegName << "}";
@@ -412,6 +240,7 @@ static void printMasking(raw_ostream &OS, const MCInst *MI,
 /// newline terminated strings to the specified string if desired.  This
 /// information is shown in disassembly dumps when verbose assembly is enabled.
 bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
+                                  const MCInstrInfo &MCII,
                                   const char *(*getRegName)(unsigned)) {
   // If this is a shuffle operation, the switch should fill in this state.
   SmallVector<int, 8> ShuffleMask;
@@ -1156,7 +985,7 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
   if (!DestName) DestName = Src1Name;
   if (DestName) {
     OS << DestName;
-    printMasking(OS, MI, getRegName);
+    printMasking(OS, MI, MCII, getRegName);
   } else
     OS << "mem";